public void InvalidReadAfterReset()
{
TestContext.WriteLine("SecurityPic, invalid read after reset");
var result = securityPic.read();
Assert.That(result, Is.EqualTo(0));
}
public byte read(ushort offset)
{
switch (offset)
{
case OP.WPC_LEDS:
case OP.WPC_RAM_BANK:
case OP.WPC_ROM_LOCK:
case OP.WPC_EXTBOARD1:
case OP.WPC_EXTBOARD2:
case OP.WPC_EXTBOARD3:
Debug.Print("READ {0} {1}", REVERSEOP[offset], ram[offset]);
return(ram[offset]);
case OP.WPC95_FLIPPER_COIL_OUTPUT:
case OP.WPC95_FLIPPER_SWITCH_INPUT:
case OP.WPC_FLIPTRONICS_FLIPPER_PORT_A:
Debug.Print("READ {0}", REVERSEOP[offset]);
return(inputSwitchMatrix.getFliptronicsKeys());
case OP.WPC_RAM_LOCK:
case OP.WPC_RAM_LOCKSIZE:
Debug.Print("READ {0} {1}", REVERSEOP[offset], ram[offset]);
return(ram[offset]);
case OP.WPC_SWITCH_CABINET_INPUT:
Debug.Print("READ {0}", REVERSEOP[offset]);
return(inputSwitchMatrix.getCabinetKey());
case OP.WPC_ROM_BANK:
Debug.Print("READ {0} {1}", REVERSEOP[offset], ram[offset]);
return((byte)(ram[offset] & pageMask));
case OP.WPC_SWITCH_ROW_SELECT:
Debug.Print("READ {0}", REVERSEOP[offset]);
if (hardwareHasSecurityPic)
{
return(securityPic.read((col) => {
return inputSwitchMatrix.getRow(col);
}));
}
return(inputSwitchMatrix.getActiveRow());
case OP.WPC_SHIFTADDRH:
{
byte temp = (byte)((ram[OP.WPC_SHIFTADDRH] +
((ram[OP.WPC_SHIFTADDRL] + (ram[OP.WPC_SHIFTBIT] >> 3)) >> 8)
) & 0xFF);
Debug.Print("READ {0} {1}", REVERSEOP[offset], temp);
return(temp);
}
case OP.WPC_SHIFTADDRL:
{
byte temp = (byte)((ram[OP.WPC_SHIFTADDRL] + (ram[OP.WPC_SHIFTBIT] >> 3)) & 0xFF);
Debug.Print("READ {0} {1}", REVERSEOP[offset], temp);
return(temp);
}
case OP.WPC_SHIFTBIT:
case OP.WPC_SHIFTBIT2:
Debug.Print("READ {0} {1}", REVERSEOP[offset], ram[offset]);
return((byte)(1 << (ram[offset] & 0x07)));
case OP.WPC_CLK_HOURS_DAYS:
{
//temp = new Date();
DateTime temp = getTime();
Debug.Print("READ WPC_CLK_HOURS_DAYS");
// checksum needs to be stored in RAM
ushort checksum = 0;
checksum += ram[NVRAM_CLOCK_YEAR_HI] = (byte)(temp.Year >> 8);
checksum += ram[NVRAM_CLOCK_YEAR_LO] = (byte)(temp.Year & 0xFF);
//month (1-12),
checksum += ram[NVRAM_CLOCK_MONTH] = (byte)temp.Month;
//day of month (1-31)
checksum += ram[NVRAM_CLOCK_DAY_OF_MONTH] = (byte)temp.Day;
//day of the week (0-6, 0=Sunday)
checksum += ram[NVRAM_CLOCK_DAY_OF_WEEK] = (byte)(temp.DayOfWeek + 1);
//hour (0-23)
checksum += ram[NVRAM_CLOCK_HOUR] = 0;
//0 means invalid, 1 means valid
checksum += ram[NVRAM_CLOCK_IS_VALID] = 1;
checksum = (ushort)(0xFFFF - checksum);
ram[NVRAM_CLOCK_CHECKSUM_TIME] = (byte)(checksum >> 8);
ram[NVRAM_CLOCK_CHECKSUM_DATE] = (byte)(checksum & 0xFF);
return((byte)temp.Hour);
}
case OP.WPC_CLK_MINS:
{
DateTime temp = getTime();
Debug.Print("READ WPC_CLK_MINS");
return((byte)temp.Minute);
}
case OP.WPC_SW_JUMPER_INPUT:
//SW1 SW2 W20 W19 Country(SW4-SW8)
Debug.Print("READ WPC_SW_JUMPER_INPUT {0}", dipSwitchSetting);
return(dipSwitchSetting);
case OP.WPC_ZEROCROSS_IRQ_CLEAR:
{
if (zeroCrossFlag != 0)
{
Debug.Print("RESET GI ZC COUNT");
irqCountGI = 0;
}
byte temp = (byte)(zeroCrossFlag << 7 | (ram[offset] & 0x7F));
Debug.Print("READ WPC_ZEROCROSS_IRQ_CLEAR {0} {1}", temp, (zeroCrossFlag != 0) ? "ZCF_SET" : "ZCF_NOTSET");
zeroCrossFlag = 0;
return(temp);
}
case OP.WPC_PERIPHERAL_TIMER_FIRQ_CLEAR:
Debug.Print("READ WPC_PERIPHERAL_TIMER_FIRQ_CLEAR {0}", _firqSourceDmd);
return((byte)(_firqSourceDmd == true ? 0x00 : WPC_FIRQ_CLEAR_BIT));
default:
Debug.Print("R_NOT_IMPLEMENTED {0} {1}", "0x" + offset.ToString("X4"), ram[offset]);
Debug.Print("ASIC_READ_NOT_IMPLEMENTED {0} {1}", "0x" + offset.ToString("X4"), ram[offset]);
break;
}
return(0);
}