private Expression RewriteSrcOp(int iOp, PrimitiveType width) { var op = this.instr.Operands[iOp]; switch (op) { case RegisterOperand regOp: var reg = binder.EnsureRegister(regOp.Register); if (reg == null) { return(null); } if (width.Size == 4) { return(reg); } else if (width.Size == 8) { var rHi = arch.GetRegister(1 + (int)reg.Storage.Domain); if (rHi == null) { return(null); } var regHi = binder.EnsureRegister(rHi); return(binder.EnsureSequence(width, regHi.Storage, reg.Storage)); } else if (width.Size == 16) { var regHi1 = binder.EnsureRegister(arch.GetRegister(1 + (int)reg.Storage.Domain)); var regHi2 = binder.EnsureRegister(arch.GetRegister(2 + (int)reg.Storage.Domain)); var regHi3 = binder.EnsureRegister(arch.GetRegister(3 + (int)reg.Storage.Domain)); var regLo = binder.EnsureSequence(PrimitiveType.Word64, regHi1.Storage, reg.Storage); var regHi = binder.EnsureSequence(PrimitiveType.Word64, regHi3.Storage, regHi2.Storage); return(binder.EnsureSequence(width, regHi.Storage, regLo.Storage)); } else { return(m.Slice(width, reg, 0)); } case ImmediateOperand immOp: return(immOp.Value); case MemoryOperand memOp: Expression ea; if (memOp.Base != null) { reg = binder.EnsureRegister(memOp.Base); if (memOp.AutoDecrement) { m.Assign(reg, m.ISub(reg, width.Size)); } else if (memOp.AutoIncrement) { var tmp = binder.CreateTemporary(reg.DataType); m.Assign(tmp, reg); reg = tmp; } ea = reg; if (memOp.Offset != null) { if (memOp.Offset.DataType.BitSize < ea.DataType.BitSize) { ea = m.IAddS(ea, memOp.Offset.ToInt32()); } else { ea = m.IAdd(ea, memOp.Offset); } } if (memOp.Index != null) { Expression idx = binder.EnsureRegister(memOp.Index); if (width.Size != 1) { idx = m.IMul(idx, Constant.Int32(width.Size)); } ea = m.IAdd(ea, idx); } Expression load; if (memOp.Deferred) { load = m.Mem(width, m.Mem32(ea)); } else { load = m.Mem(width, ea); } if (memOp.AutoIncrement) { reg = binder.EnsureRegister(memOp.Base); int inc = (memOp.Deferred) ? 4 : width.Size; m.Assign(reg, m.IAdd(reg, inc)); } return(load); } else { ea = arch.MakeAddressFromConstant(memOp.Offset, false); Expression load; if (memOp.Deferred) { load = m.Mem(width, m.Mem32(ea)); } else { load = m.Mem(width, ea); } return(load); } case AddressOperand addrOp: //$BUG: enabling the commented code causes huge regressions in the // unzip subject. /*if (addrOp.Width.BitSize > width.BitSize) * { * var c = addrOp.Address.ToUInt32(); * return Constant.Create(width, c); * } * else if (addrOp.Width.BitSize < width.BitSize) * { * return m.Convert(addrOp.Address, addrOp.Address.DataType, width); * } * else*/ { return(addrOp.Address); } } throw new NotImplementedException(op.GetType().Name); }
public IEnumerator <RtlInstructionCluster> GetEnumerator() { while (dasm.MoveNext()) { this.instr = dasm.Current; var cluster = new List <RtlInstruction>(); m = new RtlEmitter(cluster); rtlc = instr.InstructionClass; switch (instr.Mnemonic) { default: EmitUnitTest(); host.Warn( instr.Address, "AArch64 instruction {0} is not supported yet.", instr); goto case Mnemonic.Invalid; case Mnemonic.Invalid: rtlc = InstrClass.Invalid; m.Invalid(); break; case Mnemonic.add: RewriteMaybeSimdBinary(m.IAdd, "__add_{0}"); break; case Mnemonic.adds: RewriteBinary(m.IAdd, this.NZCV); break; case Mnemonic.addv: RewriteAddv(); break; case Mnemonic.adr: RewriteUnary(n => n); break; case Mnemonic.asrv: RewriteBinary(m.Sar); break; case Mnemonic.bic: RewriteBinary((a, b) => m.And(a, m.Comp(b))); break; case Mnemonic.adrp: RewriteAdrp(); break; case Mnemonic.and: RewriteBinary(m.And); break; case Mnemonic.ands: RewriteBinary(m.And, this.NZ00); break; case Mnemonic.asr: RewriteBinary(m.Sar); break; case Mnemonic.b: RewriteB(); break; case Mnemonic.bfm: RewriteBfm(); break; case Mnemonic.bl: RewriteBl(); break; case Mnemonic.blr: RewriteBlr(); break; case Mnemonic.br: RewriteBr(); break; case Mnemonic.cbnz: RewriteCb(m.Ne0); break; case Mnemonic.cbz: RewriteCb(m.Eq0); break; case Mnemonic.ccmn: RewriteCcmn(); break; case Mnemonic.ccmp: RewriteCcmp(); break; case Mnemonic.clz: RewriteClz(); break; case Mnemonic.cmp: RewriteCmp(); break; case Mnemonic.cmeq: RewriteCmeq(); break; case Mnemonic.csel: RewriteCsel(); break; case Mnemonic.csinc: RewriteCsinc(); break; case Mnemonic.csinv: RewriteCsinv(); break; case Mnemonic.csneg: RewriteCsneg(); break; case Mnemonic.dsb: RewriteDsb(); break; case Mnemonic.dup: RewriteDup(); break; case Mnemonic.eor: RewriteBinary(m.Xor); break; case Mnemonic.fabs: RewriteFabs(); break; case Mnemonic.fadd: RewriteFadd(); break; case Mnemonic.fcmp: RewriteFcmp(); break; case Mnemonic.fcsel: RewriteFcsel(); break; case Mnemonic.fcvt: RewriteFcvt(); break; case Mnemonic.fcvtms: RewriteFcvtms(); break; case Mnemonic.fcvtps: RewriteFcvtps(); break; case Mnemonic.fcvtzs: RewriteFcvtzs(); break; case Mnemonic.fdiv: RewriteMaybeSimdBinary(m.FDiv, "__fdiv_{0}", Domain.Real); break; case Mnemonic.fmadd: RewriteIntrinsicFTernary("__fmaddf", "__fmadd"); break; case Mnemonic.fmsub: RewriteIntrinsicFTernary("__fmsubf", "__fmsub"); break; case Mnemonic.fmax: RewriteIntrinsicFBinary("fmaxf", "fmax"); break; case Mnemonic.fmin: RewriteIntrinsicFBinary("fminf", "fmin"); break; case Mnemonic.fmov: RewriteFmov(); break; case Mnemonic.fmul: RewriteFmul(); break; case Mnemonic.fneg: RewriteUnary(m.FNeg); break; case Mnemonic.fnmul: RewriteFnmul(); break; case Mnemonic.fsqrt: RewriteFsqrt(); break; case Mnemonic.fsub: RewriteMaybeSimdBinary(m.FSub, "__fsub_{0}", Domain.Real); break; case Mnemonic.isb: RewriteIsb(); break; case Mnemonic.ld1r: RewriteLdNr("__ld1r"); break; case Mnemonic.ld2: RewriteLdN("__ld2"); break; case Mnemonic.ld3: RewriteLdN("__ld3"); break; case Mnemonic.ld4: RewriteLdN("__ld4"); break; case Mnemonic.ldp: RewriteLoadStorePair(true); break; case Mnemonic.ldpsw: RewriteLoadStorePair(true, PrimitiveType.Int32, PrimitiveType.Int64); break; case Mnemonic.ldr: RewriteLdr(null); break; case Mnemonic.ldrb: RewriteLdr(PrimitiveType.Byte); break; case Mnemonic.ldrh: RewriteLdr(PrimitiveType.Word16); break; case Mnemonic.ldrsb: RewriteLdr(PrimitiveType.SByte); break; case Mnemonic.ldrsh: RewriteLdr(PrimitiveType.Int16); break; case Mnemonic.ldrsw: RewriteLdr(PrimitiveType.Int32); break; case Mnemonic.lslv: RewriteBinary(m.Shl); break; case Mnemonic.lsrv: RewriteBinary(m.Shr); break; case Mnemonic.ldur: RewriteLdr(null); break; case Mnemonic.ldurb: RewriteLdr(PrimitiveType.Byte); break; case Mnemonic.ldurh: RewriteLdr(PrimitiveType.Word16); break; case Mnemonic.ldursb: RewriteLdr(PrimitiveType.SByte); break; case Mnemonic.ldursh: RewriteLdr(PrimitiveType.Int16); break; case Mnemonic.ldursw: RewriteLdr(PrimitiveType.Int32); break; case Mnemonic.lsl: RewriteBinary(m.Shl); break; case Mnemonic.lsr: RewriteBinary(m.Shr); break; case Mnemonic.madd: RewriteMaddSub(m.IAdd); break; case Mnemonic.mneg: RewriteBinary((a, b) => m.Neg(m.IMul(a, b))); break; case Mnemonic.msub: RewriteMaddSub(m.ISub); break; case Mnemonic.mov: RewriteMov(); break; case Mnemonic.movi: RewriteMovi(); break; case Mnemonic.movk: RewriteMovk(); break; case Mnemonic.movn: RewriteMovn(); break; case Mnemonic.movz: RewriteMovz(); break; case Mnemonic.mrs: RewriteMrs(); break; case Mnemonic.msr: RewriteMsr(); break; case Mnemonic.mul: RewriteMaybeSimdBinary(m.IMul, "__mul_{0}"); break; case Mnemonic.mvn: RewriteUnary(m.Comp); break; case Mnemonic.nop: m.Nop(); break; case Mnemonic.not: RewriteMaybeSimdUnary(m.Comp, "__not_{0}"); break; case Mnemonic.orr: RewriteBinary(m.Or); break; case Mnemonic.orn: RewriteBinary((a, b) => m.Or(a, m.Comp(b))); break; case Mnemonic.prfm: RewritePrfm(); break; case Mnemonic.ret: RewriteRet(); break; case Mnemonic.rev16: RewriteRev16(); break; case Mnemonic.ror: RewriteRor(); break; case Mnemonic.rorv: RewriteRor(); break; case Mnemonic.sbfiz: RewriteSbfiz(); break; case Mnemonic.sbfm: RewriteUSbfm("__sbfm"); break; case Mnemonic.scvtf: RewriteScvtf(); break; case Mnemonic.sdiv: RewriteBinary(m.SDiv); break; case Mnemonic.shrn: RewriteShrn(); break; case Mnemonic.smaddl: RewriteMaddl(PrimitiveType.Int64, m.SMul); break; case Mnemonic.smax: RewriteSmax(); break; case Mnemonic.smaxv: RewriteSmaxv(); break; case Mnemonic.smc: RewriteSmc(); break; case Mnemonic.smull: RewriteMull(PrimitiveType.Int64, m.SMul); break; case Mnemonic.st1: RewriteStN("__st1"); break; case Mnemonic.st2: RewriteStN("__st2"); break; case Mnemonic.st3: RewriteStN("__st3"); break; case Mnemonic.st4: RewriteStN("__st4"); break; case Mnemonic.stp: RewriteLoadStorePair(false); break; case Mnemonic.str: RewriteStr(null); break; case Mnemonic.strb: RewriteStr(PrimitiveType.Byte); break; case Mnemonic.strh: RewriteStr(PrimitiveType.Word16); break; case Mnemonic.stur: RewriteStr(null); break; case Mnemonic.sturb: RewriteStr(PrimitiveType.Byte); break; case Mnemonic.sturh: RewriteStr(PrimitiveType.Word16); break; case Mnemonic.sub: RewriteBinary(m.ISub); break; case Mnemonic.subs: RewriteBinary(m.ISub, NZCV); break; case Mnemonic.svc: RewriteSvc(); break; case Mnemonic.sxtb: RewriteUSxt(Domain.SignedInt, 8); break; case Mnemonic.sxth: RewriteUSxt(Domain.SignedInt, 16); break; case Mnemonic.sxtl: RewriteSimdUnary("__sxtl_{0}", Domain.SignedInt); break; case Mnemonic.sxtw: RewriteUSxt(Domain.SignedInt, 32); break; case Mnemonic.tbnz: RewriteTb(m.Ne0); break; case Mnemonic.tbz: RewriteTb(m.Eq0); break; case Mnemonic.test: RewriteTest(); break; case Mnemonic.uaddw: RewriteUaddw(); break; case Mnemonic.ubfm: RewriteUSbfm("__ubfm"); break; case Mnemonic.ucvtf: RewriteIcvt(Domain.UnsignedInt); break; case Mnemonic.udiv: RewriteBinary(m.UDiv); break; case Mnemonic.umaddl: RewriteMaddl(PrimitiveType.UInt64, m.UMul); break; case Mnemonic.umlal: RewriteUmlal(); break; case Mnemonic.umull: RewriteMull(PrimitiveType.UInt64, m.UMul); break; case Mnemonic.umulh: RewriteMulh(PrimitiveType.UInt64, m.UMul); break; case Mnemonic.uxtb: RewriteUSxt(Domain.UnsignedInt, 8); break; case Mnemonic.uxth: RewriteUSxt(Domain.UnsignedInt, 16); break; case Mnemonic.uxtl: RewriteSimdUnary("__uxtl_{0}", Domain.UnsignedInt); break; case Mnemonic.uxtw: RewriteUSxt(Domain.UnsignedInt, 32); break; case Mnemonic.xtn: RewriteSimdUnary("__xtn_{0}", Domain.None); break; } yield return(new RtlInstructionCluster(instr.Address, instr.Length, cluster.ToArray()) { Class = rtlc, }); } }
public HExpr IMul(HExpr a, HExpr b) { return(MapToHandle(m.IMul(GetExpression(a), GetExpression(b)))); }
} // the data width of the current instruction being rewritten. /// <summary> /// Rewrite operands being used as sources. /// </summary> /// <param name="operand"></param> /// <param name="addrInstr">Address of the current instruction</param> public Expression RewriteSrc(MachineOperand operand, Address addrInstr, bool addressAsAddress = false) { Expression ea; Expression r; switch (operand) { case RegisterOperand reg: r = binder.EnsureRegister(reg.Register); if (DataWidth != null && DataWidth.Size != reg.Width.Size) { if (DataWidth.Domain == Domain.Real) { r = m.Convert(r, r.DataType, DataWidth); } else { r = m.Slice(DataWidth, r, 0); } } return(r); case M68kImmediateOperand imm: if (imm.Width.Domain == Domain.Real) { return(imm.Constant.CloneExpression()); } if (DataWidth != null && DataWidth.BitSize > imm.Width.BitSize) { return(Constant.Create(DataWidth, imm.Constant.ToInt64())); } else { return(Constant.Create(imm.Width, imm.Constant.ToUInt32())); } case MemoryOperand mem: return(RewriteMemoryAccess(mem, DataWidth, addrInstr)); case M68kAddressOperand addr: if (addressAsAddress) { return(addr.Address); } else { return(m.Mem(DataWidth, addr.Address)); } case PredecrementMemoryOperand pre: ea = binder.EnsureRegister(pre.Register); m.Assign(ea, m.ISubS(ea, DataWidth.Size)); return(m.Mem(DataWidth, ea)); case PostIncrementMemoryOperand post: r = binder.EnsureRegister(post.Register); var tmp = binder.CreateTemporary(DataWidth); m.Assign(tmp, m.Mem(DataWidth, r)); m.Assign(r, m.IAddS(r, DataWidth.Size)); return(tmp); case IndirectIndexedOperand indidx: ea = RewriteIndirectBaseRegister(indidx, addrInstr); Expression ix = binder.EnsureRegister(indidx.XRegister); if (indidx.XWidth.Size != 4) { ix = m.Slice(PrimitiveType.Int16, ix, 0); ix = m.Convert(ix, PrimitiveType.Int16, PrimitiveType.Int32); } if (indidx.Scale > 1) { ix = m.IMul(ix, Constant.Int32(indidx.Scale)); } return(m.Mem(DataWidth, m.IAdd(ea, ix))); case IndexedOperand indop: ea = Combine(indop.BaseDisplacement, indop.Base, addrInstr); if (indop.postindex) { ea = m.Mem32(ea); } if (indop.Index != null) { var idx = Combine(null, indop.Index, addrInstr); if (indop.index_reg_width !.BitSize != 32) { idx = m.Convert(m.Slice(PrimitiveType.Int16, idx, 0), PrimitiveType.Int16, PrimitiveType.Int32); } if (indop.IndexScale > 1) { idx = m.IMul(idx, indop.IndexScale); } ea = Combine(ea, idx); } if (indop.preindex) { ea = m.Mem32(ea); } ea = Combine(ea, indop.OuterDisplacement); return(m.Mem(DataWidth, ea)); } throw new NotImplementedException("Unimplemented RewriteSrc for operand type " + operand.GetType().Name); }
private Expression RewriteSrcOp(int iOp, PrimitiveType width) { var op = this.instr.Operands[iOp]; switch (op) { case RegisterOperand regOp: var reg = binder.EnsureRegister(regOp.Register); if (reg == null) { return(null); } if (width.Size == 4) { return(reg); } else if (width.Size == 8) { var rHi = arch.GetRegister(1 + (int)reg.Storage.Domain); if (rHi == null) { return(null); } var regHi = binder.EnsureRegister(rHi); return(binder.EnsureSequence(regHi.Storage, reg.Storage, width)); } else if (width.Size == 16) { var regHi1 = binder.EnsureRegister(arch.GetRegister(1 + (int)reg.Storage.Domain)); var regHi2 = binder.EnsureRegister(arch.GetRegister(2 + (int)reg.Storage.Domain)); var regHi3 = binder.EnsureRegister(arch.GetRegister(3 + (int)reg.Storage.Domain)); var regLo = binder.EnsureSequence(regHi1.Storage, reg.Storage, PrimitiveType.Word64); var regHi = binder.EnsureSequence(regHi3.Storage, regHi2.Storage, PrimitiveType.Word64); return(binder.EnsureSequence(regHi.Storage, regLo.Storage, width)); } else { return(m.Cast(width, reg)); } case ImmediateOperand immOp: return(immOp.Value); case MemoryOperand memOp: Expression ea; if (memOp.Base != null) { reg = binder.EnsureRegister(memOp.Base); if (memOp.AutoDecrement) { m.Assign(reg, m.ISub(reg, width.Size)); } else if (memOp.AutoIncrement) { var tmp = binder.CreateTemporary(reg.DataType); m.Assign(tmp, reg); reg = tmp; } ea = reg; if (memOp.Offset != null) { ea = m.IAdd(ea, memOp.Offset); } if (memOp.Index != null) { Expression idx = binder.EnsureRegister(memOp.Index); if (width.Size != 1) { idx = m.IMul(idx, Constant.Int32(width.Size)); } ea = m.IAdd(ea, idx); } Expression load; if (memOp.Deferred) { load = m.Mem(width, m.Mem32(ea)); } else { load = m.Mem(width, ea); } if (memOp.AutoIncrement) { reg = binder.EnsureRegister(memOp.Base); int inc = (memOp.Deferred) ? 4 : width.Size; m.Assign(reg, m.IAdd(reg, inc)); } return(load); } else { ea = arch.MakeAddressFromConstant(memOp.Offset, false); Expression load; if (memOp.Deferred) { load = m.Mem(width, m.Mem32(ea)); } else { load = m.Mem(width, ea); } return(load); } case AddressOperand addrOp: return(addrOp.Address); } throw new NotImplementedException(op.GetType().Name); }
} // the data width of the current instruction being rewritten. /// <summary> /// Rewrite operands being used as sources. /// </summary> /// <param name="operand"></param> /// <param name="addrInstr">Address of the current instruction</param> /// <returns></returns> public Expression RewriteSrc(MachineOperand operand, Address addrInstr, bool addressAsAddress = false) { var reg = operand as RegisterOperand; if (reg != null) { Expression r = frame.EnsureRegister(reg.Register); if (DataWidth != null && DataWidth.Size != reg.Width.Size) { r = m.Cast(DataWidth, r); } return(r); } var imm = operand as M68kImmediateOperand; if (imm != null) { if (DataWidth != null && DataWidth.BitSize > imm.Width.BitSize) { return(Constant.Create(DataWidth, imm.Constant.ToInt64())); } else { return(Constant.Create(imm.Width, imm.Constant.ToUInt32())); } } var mem = operand as MemoryOperand; if (mem != null) { return(RewriteMemoryAccess(mem, DataWidth, addrInstr)); } var addr = operand as M68kAddressOperand; if (addr != null) { if (addressAsAddress) { return(addr.Address); } else { return(m.Load(DataWidth, addr.Address)); } } var pre = operand as PredecrementMemoryOperand; if (pre != null) { var ea = frame.EnsureRegister(pre.Register); m.Assign(ea, m.ISub(ea, DataWidth.Size)); return(m.Load(DataWidth, ea)); } var post = operand as PostIncrementMemoryOperand; if (post != null) { var r = frame.EnsureRegister(post.Register); var tmp = frame.CreateTemporary(DataWidth); m.Assign(tmp, m.Load(DataWidth, r)); m.Assign(r, m.IAdd(r, DataWidth.Size)); return(tmp); } var indidx = operand as IndirectIndexedOperand; if (indidx != null) { Expression ea = RewriteIndirectBaseRegister(indidx, addrInstr); Expression ix = frame.EnsureRegister(indidx.XRegister); if (indidx.XWidth.Size != 4) { ix = m.Cast(PrimitiveType.Int32, m.Cast(PrimitiveType.Int16, ix)); } if (indidx.Scale > 1) { ix = m.IMul(ix, Constant.Int32(indidx.Scale)); } return(m.Load(DataWidth, m.IAdd(ea, ix))); } var indop = operand as IndexedOperand; if (indop != null) { Expression ea = Combine(indop.Base, indop.base_reg); if (indop.postindex) { ea = m.LoadDw(ea); } if (indop.index_reg != null) { var idx = Combine(null, indop.index_reg); if (indop.index_scale > 1) { idx = m.IMul(idx, indop.index_scale); } ea = Combine(ea, idx); } if (indop.preindex) { ea = m.LoadDw(ea); } ea = Combine(ea, indop.outer); return(m.Load(DataWidth, ea)); } throw new NotImplementedException("Unimplemented RewriteSrc for operand type " + operand.GetType().Name); }
private Expression RewriteSrcOp(int iOp, PrimitiveType width) { var op = dasm.Current.Operands[iOp]; var regOp = op as RegisterOperand; if (regOp != null) { var reg = frame.EnsureRegister(regOp.Register); if (width.Size == 4) { return(reg); } else if (width.Size == 8) { var regHi = frame.EnsureRegister(arch.GetRegister(1 + (int)reg.Storage.Domain)); return(frame.EnsureSequence(regHi.Storage, reg.Storage, width)); } else if (width.Size == 16) { var regHi1 = frame.EnsureRegister(arch.GetRegister(1 + (int)reg.Storage.Domain)); var regHi2 = frame.EnsureRegister(arch.GetRegister(2 + (int)reg.Storage.Domain)); var regHi3 = frame.EnsureRegister(arch.GetRegister(3 + (int)reg.Storage.Domain)); var regLo = frame.EnsureSequence(regHi1.Storage, reg.Storage, PrimitiveType.Word64); var regHi = frame.EnsureSequence(regHi3.Storage, regHi2.Storage, PrimitiveType.Word64); return(frame.EnsureSequence(regHi.Storage, regLo.Storage, width)); } else { return(emitter.Cast(width, reg)); } } var immOp = op as ImmediateOperand; if (immOp != null) { return(immOp.Value); } var memOp = op as MemoryOperand; if (memOp != null) { Expression ea; if (memOp.Base != null) { var reg = frame.EnsureRegister(memOp.Base); if (memOp.AutoDecrement) { emitter.Assign(reg, emitter.ISub(reg, width.Size)); } else if (memOp.AutoIncrement) { var tmp = frame.CreateTemporary(reg.DataType); emitter.Assign(tmp, reg); reg = tmp; } ea = reg; if (memOp.Offset != null) { ea = emitter.IAdd(ea, memOp.Offset); } if (memOp.Index != null) { Expression idx = frame.EnsureRegister(memOp.Index); if (width.Size != 1) { idx = emitter.IMul(idx, Constant.Int32(width.Size)); } ea = emitter.IAdd(ea, idx); } Expression load; if (memOp.Deferred) { load = emitter.Load(width, emitter.LoadDw(ea)); } else { load = emitter.Load(width, ea); } if (memOp.AutoIncrement) { if (memOp.AutoIncrement) { reg = frame.EnsureRegister(memOp.Base); int inc = (memOp.Deferred) ? 4 : width.Size; emitter.Assign(reg, emitter.IAdd(reg, inc)); } } return(load); } else { } } var addrOp = op as AddressOperand; if (addrOp != null) { return(addrOp.Address); } throw new NotImplementedException(op.GetType().Name); }
public IEnumerator <RtlInstructionCluster> GetEnumerator() { while (dasm.MoveNext()) { this.instr = dasm.Current; iclass = instr.InstructionClass; try { switch (instr.Mnemonic) { default: EmitUnitTest(); host.Warn( instr.Address, "AArch64 instruction {0} is not supported yet.", instr); goto case Mnemonic.Invalid; case Mnemonic.Invalid: iclass = InstrClass.Invalid; m.Invalid(); break; case Mnemonic.abs: RewriteSimdUnary("__abs_{0}", Domain.SignedInt); break; case Mnemonic.adc: RewriteAdcSbc(m.IAdd); break; case Mnemonic.adcs: RewriteAdcSbc(m.IAdd, this.NZCV); break; case Mnemonic.add: RewriteMaybeSimdBinary(m.IAdd, "__add_{0}"); break; case Mnemonic.addhn: RewriteSimdBinary("__addhn_{0}", Domain.None); break; case Mnemonic.addhn2: RewriteSimdBinary("__addhn2_{0}", Domain.None); break; case Mnemonic.addp: RewriteSimdBinary("__addp_{0}", Domain.None); break; case Mnemonic.adds: RewriteBinary(m.IAdd, this.NZCV); break; case Mnemonic.addv: RewriteAddv(); break; case Mnemonic.adr: RewriteUnary(n => n); break; case Mnemonic.asrv: RewriteBinary(m.Sar); break; case Mnemonic.adrp: RewriteAdrp(); break; case Mnemonic.and: RewriteBinary(m.And); break; case Mnemonic.ands: RewriteBinary(m.And, this.NZ00); break; case Mnemonic.asr: RewriteBinary(m.Sar); break; case Mnemonic.b: RewriteB(); break; case Mnemonic.bfm: RewriteBfm(); break; case Mnemonic.bic: RewriteLogical((a, b) => m.And(a, m.Comp(b))); break; case Mnemonic.bics: RewriteBinary((a, b) => m.And(a, m.Comp(b)), NZ00); break; case Mnemonic.bif: RewriteSimdBinary("__bif_{0}", Domain.None); break; case Mnemonic.bit: RewriteSimdBinary("__bit_{0}", Domain.None); break; case Mnemonic.bl: RewriteBl(); break; case Mnemonic.blr: RewriteBlr(); break; case Mnemonic.br: RewriteBr(); break; case Mnemonic.brk: RewriteBrk(); break; case Mnemonic.bsl: RewriteBsl(); break; case Mnemonic.cbnz: RewriteCb(m.Ne0); break; case Mnemonic.cbz: RewriteCb(m.Eq0); break; case Mnemonic.ccmn: RewriteCcmn(); break; case Mnemonic.ccmp: RewriteCcmp(); break; case Mnemonic.cls: RewriteSimdUnary("__cls_{0}", Domain.None); break; case Mnemonic.clz: RewriteClz(); break; case Mnemonic.cmp: RewriteCmp(); break; case Mnemonic.cmeq: RewriteCm("__cmeq_{0}", Domain.None); break; case Mnemonic.cmge: RewriteCm("__cmge_{0}", Domain.SignedInt); break; case Mnemonic.cmgt: RewriteCm("__cmgt_{0}", Domain.SignedInt); break; case Mnemonic.cmhi: RewriteCm("__cmhi_{0}", Domain.UnsignedInt); break; case Mnemonic.cmhs: RewriteCm("__cmhs_{0}", Domain.UnsignedInt); break; case Mnemonic.cmle: RewriteCm("__cmle_{0}", Domain.SignedInt); break; case Mnemonic.cmlt: RewriteCm("__cmlt_{0}", Domain.SignedInt); break; case Mnemonic.cmtst: RewriteCm("__cmtst_{0}", Domain.None); break; case Mnemonic.cnt: RewriteSimdUnary("__cnt_{0}", Domain.None); break; case Mnemonic.csel: RewriteCsel(); break; case Mnemonic.csinc: RewriteCsinc(); break; case Mnemonic.csinv: RewriteCsinv(); break; case Mnemonic.csneg: RewriteCsneg(); break; case Mnemonic.dmb: RewriteDmb(); break; case Mnemonic.dsb: RewriteDsb(); break; case Mnemonic.dup: RewriteDup(); break; case Mnemonic.eor: RewriteBinary(m.Xor); break; case Mnemonic.eon: RewriteBinary((a, b) => m.Xor(a, m.Comp(b))); break; case Mnemonic.eret: RewriteEret(); break; case Mnemonic.ext: RewriteExt(); break; case Mnemonic.extr: RewriteExtr(); break; case Mnemonic.fabs: RewriteFabs(); break; case Mnemonic.fadd: RewriteFadd(); break; case Mnemonic.fcmp: RewriteFcmp(); break; case Mnemonic.fcmpe: RewriteFcmp(); break; //$REVIEW: this leaves out the 'e'xception part. case Mnemonic.fcsel: RewriteFcsel(); break; case Mnemonic.fcvt: RewriteFcvt(); break; case Mnemonic.fcvtms: RewriteFcvtms(); break; case Mnemonic.fcvtps: RewriteFcvtps(); break; case Mnemonic.fcvtzs: RewriteFcvtzs(); break; case Mnemonic.fdiv: RewriteMaybeSimdBinary(m.FDiv, "__fdiv_{0}", Domain.Real); break; case Mnemonic.fmadd: RewriteIntrinsicFTernary("__fmaddf", "__fmadd"); break; case Mnemonic.fmsub: RewriteIntrinsicFTernary("__fmsubf", "__fmsub"); break; case Mnemonic.fmax: RewriteIntrinsicFBinary("fmaxf", "fmax"); break; case Mnemonic.fmin: RewriteIntrinsicFBinary("fminf", "fmin"); break; case Mnemonic.fmov: RewriteFmov(); break; case Mnemonic.fmul: RewriteFmul(); break; case Mnemonic.fneg: RewriteUnary(m.FNeg); break; case Mnemonic.fnmul: RewriteFnmul(); break; case Mnemonic.fsqrt: RewriteFsqrt(); break; case Mnemonic.fsub: RewriteMaybeSimdBinary(m.FSub, "__fsub_{0}", Domain.Real); break; case Mnemonic.hlt: RewriteHlt(); break; case Mnemonic.isb: RewriteIsb(); break; case Mnemonic.ld1: RewriteLdN("__ld1"); break; case Mnemonic.ld1r: RewriteLdNr("__ld1r"); break; case Mnemonic.ld2: RewriteLdN("__ld2"); break; case Mnemonic.ld3: RewriteLdN("__ld3"); break; case Mnemonic.ld4: RewriteLdN("__ld4"); break; case Mnemonic.ldnp: RewriteLoadStorePair(true); break; case Mnemonic.ldp: RewriteLoadStorePair(true); break; case Mnemonic.ldarh: RewriteLoadAcquire("__load_acquire_{0}", PrimitiveType.Word16); break; case Mnemonic.ldaxrh: RewriteLoadAcquire("__load_acquire_exclusive_{0}", PrimitiveType.Word16); break; case Mnemonic.ldpsw: RewriteLoadStorePair(true, PrimitiveType.Int32, PrimitiveType.Int64); break; case Mnemonic.ldr: RewriteLdr(null); break; case Mnemonic.ldrb: RewriteLdr(PrimitiveType.Byte); break; case Mnemonic.ldrh: RewriteLdr(PrimitiveType.Word16); break; case Mnemonic.ldrsb: RewriteLdr(PrimitiveType.SByte); break; case Mnemonic.ldrsh: RewriteLdr(PrimitiveType.Int16); break; case Mnemonic.ldrsw: RewriteLdr(PrimitiveType.Int32, PrimitiveType.Int64); break; case Mnemonic.ldxr: RewriteLdx(instr.Operands[0].Width); break; case Mnemonic.lslv: RewriteBinary(m.Shl); break; case Mnemonic.lsrv: RewriteBinary(m.Shr); break; case Mnemonic.ldur: RewriteLdr(null); break; case Mnemonic.ldurb: RewriteLdr(PrimitiveType.Byte); break; case Mnemonic.ldurh: RewriteLdr(PrimitiveType.Word16); break; case Mnemonic.ldursb: RewriteLdr(PrimitiveType.SByte); break; case Mnemonic.ldursh: RewriteLdr(PrimitiveType.Int16); break; case Mnemonic.ldursw: RewriteLdr(PrimitiveType.Int32); break; case Mnemonic.lsl: RewriteBinary(m.Shl); break; case Mnemonic.lsr: RewriteBinary(m.Shr); break; case Mnemonic.madd: RewriteMaddSub(m.IAdd); break; case Mnemonic.mla: RewriteSimdTrinary(Domain.None); break; case Mnemonic.mls: RewriteSimdTrinary(Domain.None); break; case Mnemonic.mneg: RewriteBinary((a, b) => m.Neg(m.IMul(a, b))); break; case Mnemonic.mov: RewriteMov(); break; case Mnemonic.movi: RewriteMovi(); break; case Mnemonic.movk: RewriteMovk(); break; case Mnemonic.movn: RewriteMovn(); break; case Mnemonic.movz: RewriteMovz(); break; case Mnemonic.mrs: RewriteMrs(); break; case Mnemonic.msr: RewriteMsr(); break; case Mnemonic.msub: RewriteMaddSub(m.ISub); break; case Mnemonic.mul: RewriteMaybeSimdBinary(m.IMul, "__mul_{0}"); break; case Mnemonic.mvn: RewriteUnary(m.Comp); break; case Mnemonic.mvni: RewriteLogical((a, b) => ((BigConstant)b).Complement()); break; case Mnemonic.neg: RewriteSimdUnary("__neg_{0}", Domain.SignedInt); break; case Mnemonic.nop: m.Nop(); break; case Mnemonic.not: RewriteMaybeSimdUnary(m.Comp, "__not_{0}"); break; case Mnemonic.orr: RewriteLogical(m.Or); break; case Mnemonic.orn: RewriteBinary((a, b) => m.Or(a, m.Comp(b))); break; case Mnemonic.pmul: RewriteSimdBinary("__pmul_{0}", Domain.None); break; case Mnemonic.pmull: RewriteSimdBinary("__pmull_{0}", Domain.None); break; case Mnemonic.pmull2: RewriteSimdBinary("__pmull2_{0}", Domain.None); break; case Mnemonic.prfm: RewritePrfm(); break; case Mnemonic.raddhn: RewriteSimdBinary("__raddhn_{0}", Domain.None); break; case Mnemonic.raddhn2: RewriteSimdBinary("__raddhn2_{0}", Domain.None); break; case Mnemonic.rbit: RewriteRbit(); break; case Mnemonic.ret: RewriteRet(); break; case Mnemonic.rev: RewriteRev(); break; case Mnemonic.rev16: RewriteRev16(); break; case Mnemonic.rev32: RewriteRev32(); break; case Mnemonic.rev64: RewriteSimdUnary("__rev64_{0}", Domain.None); break; case Mnemonic.ror: RewriteRor(); break; case Mnemonic.rorv: RewriteRor(); break; case Mnemonic.rshrn: RewriteSimdBinary("__rshrn_{0}", Domain.None); break; case Mnemonic.rshrn2: RewriteSimdBinary("__rshrn2_{0}", Domain.None); break; case Mnemonic.rsubhn: RewriteSimdBinary("__rsubhn_{0}", Domain.None); break; case Mnemonic.rsubhn2: RewriteSimdBinary("__rsubhn2_{0}", Domain.None); break; case Mnemonic.saba: RewriteSimdBinary("__saba_{0}", Domain.None); break; case Mnemonic.sabal: RewriteSimdBinary("__sabal_{0}", Domain.None); break; case Mnemonic.sabal2: RewriteSimdBinary("__sabal2_{0}", Domain.None); break; case Mnemonic.sabd: RewriteSimdBinary("__sabd_{0}", Domain.None); break; case Mnemonic.sabdl: RewriteSimdBinary("__sabdl_{0}", Domain.None); break; case Mnemonic.sabdl2: RewriteSimdBinary("__sabdl2_{0}", Domain.None); break; case Mnemonic.sadalp: RewriteSimdBinary("__sadalp_{0}", Domain.SignedInt); break; case Mnemonic.saddl: RewriteSimdBinary("__saddl_{0}", Domain.SignedInt); break; case Mnemonic.saddl2: RewriteSimdBinary("__saddl2_{0}", Domain.SignedInt); break; case Mnemonic.saddlp: RewriteSimdUnary("__saddlp_{0}", Domain.SignedInt); break; case Mnemonic.saddlv: RewriteSimdUnary("__saddlv_{0}", Domain.SignedInt); break; case Mnemonic.saddw: RewriteSimdBinary("__saddw_{0}", Domain.SignedInt); break; case Mnemonic.saddw2: RewriteSimdBinary("__saddw2_{0}", Domain.SignedInt); break; case Mnemonic.sbc: RewriteAdcSbc(m.ISub); break; case Mnemonic.sbcs: RewriteAdcSbc(m.ISub, NZCV); break; case Mnemonic.sbfiz: RewriteSbfiz(); break; case Mnemonic.sbfm: RewriteUSbfm("__sbfm"); break; case Mnemonic.scvtf: RewriteIcvtf("s", Domain.SignedInt); break; case Mnemonic.sdiv: RewriteBinary(m.SDiv); break; case Mnemonic.shadd: RewriteSimdBinary("__shadd_{0}", Domain.SignedInt); break; case Mnemonic.shl: RewriteSimdBinary("__shl_{0}", Domain.None); break; case Mnemonic.shll: RewriteSimdBinary("__shll_{0}", Domain.None); break; case Mnemonic.shll2: RewriteSimdBinary("__shll2_{0}", Domain.None); break; case Mnemonic.shrn: RewriteShrn(); break; case Mnemonic.shsub: RewriteSimdBinary("__shsub_{0}", Domain.SignedInt); break; case Mnemonic.sli: RewriteSimdBinary("__sli_{0}", Domain.None); break; case Mnemonic.smaddl: RewriteMaddl(PrimitiveType.Int64, m.SMul); break; case Mnemonic.smax: RewriteSimdBinary("__smax_{0}", Domain.SignedInt); break; case Mnemonic.smaxp: RewriteSimdBinary("__smaxp_{0}", Domain.SignedInt); break; case Mnemonic.smaxv: RewriteSimdReduce("__smaxv_{0}", Domain.SignedInt); break; case Mnemonic.smc: RewriteSmc(); break; case Mnemonic.smin: RewriteSimdBinary("__smin_{0}", Domain.SignedInt); break; case Mnemonic.sminp: RewriteSimdBinary("__sminp_{0}", Domain.SignedInt); break; case Mnemonic.sminv: RewriteSimdUnary("__sminv_{0}", Domain.SignedInt); break; case Mnemonic.smlal: RewriteSimdTrinary(Domain.SignedInt); break; case Mnemonic.smlal2: RewriteSimdTrinary(Domain.SignedInt); break; case Mnemonic.smlsl: RewriteSimdTrinary(Domain.SignedInt); break; case Mnemonic.smlsl2: RewriteSimdTrinary(Domain.SignedInt); break; case Mnemonic.smov: RewriteVectorElementToScalar(Domain.SignedInt); break; case Mnemonic.smsubl: RewriteSmsubl(); break; case Mnemonic.smull: RewriteMull(PrimitiveType.Int32, PrimitiveType.Int64, m.SMul); break; case Mnemonic.smull2: RewriteSimdBinary("__smull2_{0}", Domain.SignedInt); break; case Mnemonic.smulh: RewriteMulh(PrimitiveType.Int64, PrimitiveType.Int128, m.SMul); break; case Mnemonic.sqabs: RewriteSimdUnary("__sqabs_{0}", Domain.SignedInt); break; case Mnemonic.sqadd: RewriteSimdBinary("__sqadd_{0}", Domain.SignedInt); break; case Mnemonic.sqdmulh: RewriteMaybeSimdBinary(Domain.SignedInt); break; case Mnemonic.sqdmull: RewriteSimdBinary("__sqdmull_{0}", Domain.SignedInt); break; case Mnemonic.sqdmull2: RewriteSimdBinary("__sqdmull2_{0}", Domain.SignedInt); break; case Mnemonic.sqdmlal: RewriteSimdTrinary(Domain.SignedInt); break; case Mnemonic.sqdmlal2: RewriteSimdTrinary(Domain.SignedInt); break; case Mnemonic.sqdmlsl: RewriteSimdTrinary(Domain.SignedInt); break; case Mnemonic.sqdmlsl2: RewriteSimdTrinary(Domain.SignedInt); break; case Mnemonic.sqneg: RewriteSimdUnary("__sqneg_{0}", Domain.SignedInt); break; case Mnemonic.sqrdmlah: RewriteSimdTrinary(Domain.SignedInt); break; case Mnemonic.sqrdmlsh: RewriteSimdTrinary(Domain.SignedInt); break; case Mnemonic.sqrdmulh: RewriteSimdBinary("__sqrdmulh_{0}", Domain.SignedInt); break; case Mnemonic.sqrshl: RewriteSimdBinary("__sqrshl_{0}", Domain.SignedInt); break; case Mnemonic.sqrshrn: RewriteSimdBinary("__sqrshrn_{0}", Domain.SignedInt); break; case Mnemonic.sqrshrn2: RewriteSimdBinary("__sqrshrn2_{0}", Domain.SignedInt); break; case Mnemonic.sqrshrun: RewriteSimdBinary("__sqrshrun_{0}", Domain.SignedInt); break; case Mnemonic.sqrshrun2: RewriteSimdBinary("__sqrshrun2_{0}", Domain.SignedInt); break; case Mnemonic.sqshl: RewriteSimdBinary("__sqshl_{0}", Domain.SignedInt); break; case Mnemonic.sqshlu: RewriteSimdBinary("__sqshlu_{0}", Domain.SignedInt); break; case Mnemonic.sqshrn: RewriteSimdBinary("__sqshrn_{0}", Domain.SignedInt); break; case Mnemonic.sqshrn2: RewriteSimdBinary("__sqshrn2_{0}", Domain.SignedInt); break; case Mnemonic.sqsub: RewriteSimdBinary("__sqsub_{0}", Domain.SignedInt); break; case Mnemonic.sqxtn: RewriteSimdUnary("__sqxtn_{0}", Domain.SignedInt); break; case Mnemonic.sqxtn2: RewriteSimdUnary("__sqxtn2_{0}", Domain.SignedInt); break; case Mnemonic.sqxtun: RewriteSimdUnary("__sqxtun_{0}", Domain.SignedInt); break; case Mnemonic.sqxtun2: RewriteSimdUnary("__sqxtun2_{0}", Domain.SignedInt); break; case Mnemonic.sri: RewriteSimdBinary("__sri_{0}", Domain.SignedInt); break; case Mnemonic.srhadd: RewriteSimdBinary("__srhadd_{0}", Domain.SignedInt); break; case Mnemonic.srshl: RewriteSimdBinary("__srshl_{0}", Domain.SignedInt); break; case Mnemonic.srshr: RewriteSimdBinary("__srshr_{0}", Domain.SignedInt); break; case Mnemonic.srsra: RewriteSimdBinary("__srsra_{0}", Domain.SignedInt); break; case Mnemonic.sshl: RewriteSimdBinary("__sshl_{0}", Domain.SignedInt); break; case Mnemonic.sshll: RewriteSimdBinary("__sshll_{0}", Domain.SignedInt); break; case Mnemonic.sshll2: RewriteSimdBinary("__sshll2_{0}", Domain.SignedInt); break; case Mnemonic.sshr: RewriteSimdWithScalar("__sshr_{0}", Domain.SignedInt); break; case Mnemonic.ssra: RewriteSimdBinary("__ssra_{0}", Domain.SignedInt); break; case Mnemonic.ssubl: RewriteSimdBinary("__ssubl_{0}", Domain.SignedInt); break; case Mnemonic.ssubl2: RewriteSimdBinary("__ssubl2_{0}", Domain.SignedInt); break; case Mnemonic.ssubw: RewriteSimdBinary("__ssubw_{0}", Domain.SignedInt); break; case Mnemonic.ssubw2: RewriteSimdBinary("__ssubw2_{0}", Domain.SignedInt); break; case Mnemonic.subhn: RewriteSimdBinary("__subhn_{0}", Domain.SignedInt); break; case Mnemonic.subhn2: RewriteSimdBinary("__subhn2_{0}", Domain.SignedInt); break; case Mnemonic.suqadd: RewriteSimdBinary("__suqadd_{0}", Domain.SignedInt); break; case Mnemonic.st1: RewriteStN("__st1"); break; case Mnemonic.st2: RewriteStN("__st2"); break; case Mnemonic.st3: RewriteStN("__st3"); break; case Mnemonic.st4: RewriteStN("__st4"); break; case Mnemonic.stlr: RewriteStlr(instr.Operands[0].Width); break; case Mnemonic.stlrh: RewriteStlr(PrimitiveType.Word16); break; case Mnemonic.stp: RewriteLoadStorePair(false); break; case Mnemonic.str: RewriteStr(null); break; case Mnemonic.strb: RewriteStr(PrimitiveType.Byte); break; case Mnemonic.strh: RewriteStr(PrimitiveType.Word16); break; case Mnemonic.stur: RewriteStr(null); break; case Mnemonic.sturb: RewriteStr(PrimitiveType.Byte); break; case Mnemonic.sturh: RewriteStr(PrimitiveType.Word16); break; case Mnemonic.stxr: RewriteStx(instr.Operands[1].Width); break; case Mnemonic.stxrb: RewriteStx(PrimitiveType.Byte); break; case Mnemonic.sub: RewriteBinary(m.ISub); break; case Mnemonic.subs: RewriteBinary(m.ISub, NZCV); break; case Mnemonic.svc: RewriteSvc(); break; case Mnemonic.sxtb: RewriteUSxt(Domain.SignedInt, 8); break; case Mnemonic.sxth: RewriteUSxt(Domain.SignedInt, 16); break; case Mnemonic.sxtl: RewriteSimdUnary("__sxtl_{0}", Domain.SignedInt); break; case Mnemonic.sxtw: RewriteUSxt(Domain.SignedInt, 32); break; case Mnemonic.tbnz: RewriteTb(m.Ne0); break; case Mnemonic.tbl: RewriteTbl(); break; case Mnemonic.tbx: RewriteTbx(); break; case Mnemonic.tbz: RewriteTb(m.Eq0); break; case Mnemonic.test: RewriteTest(); break; case Mnemonic.trn1: RewriteSimdBinary("__trn1_{0}", Domain.UnsignedInt); break; case Mnemonic.trn2: RewriteSimdBinary("__trn2_{0}", Domain.UnsignedInt); break; case Mnemonic.uaba: RewriteSimdBinary("__uaba_{0}", Domain.UnsignedInt); break; case Mnemonic.uabal: RewriteSimdBinary("__uabal_{0}", Domain.UnsignedInt); break; case Mnemonic.uabal2: RewriteSimdBinary("__uabal2_{0}", Domain.UnsignedInt); break; case Mnemonic.uabd: RewriteSimdBinary("__uabd_{0}", Domain.UnsignedInt); break; case Mnemonic.uabdl: RewriteSimdBinary("__uabdl_{0}", Domain.UnsignedInt); break; case Mnemonic.uabdl2: RewriteSimdBinary("__uabdl2_{0}", Domain.UnsignedInt); break; case Mnemonic.uadalp: RewriteSimdBinary("__uadalp_{0}", Domain.UnsignedInt); break; case Mnemonic.uaddl: RewriteSimdBinary("__uaddl_{0}", Domain.UnsignedInt); break; case Mnemonic.uaddl2: RewriteSimdBinary("__uaddl2_{0}", Domain.UnsignedInt); break; case Mnemonic.uaddlp: RewriteSimdBinary("__uaddlp_{0}", Domain.UnsignedInt); break; case Mnemonic.uaddlv: RewriteSimdUnary("__uaddlv_{0}", Domain.UnsignedInt); break; case Mnemonic.uaddw: RewriteUaddw(); break; case Mnemonic.uaddw2: RewriteSimdBinary("__uaddw_{0}", Domain.UnsignedInt); break; case Mnemonic.ubfm: RewriteUSbfm("__ubfm"); break; case Mnemonic.ucvtf: RewriteIcvtf("u", Domain.UnsignedInt); break; case Mnemonic.udiv: RewriteBinary(m.UDiv); break; case Mnemonic.uhadd: RewriteSimdBinary("__uhadd_{0}", Domain.UnsignedInt); break; case Mnemonic.uhsub: RewriteSimdBinary("__uhsub_{0}", Domain.UnsignedInt); break; case Mnemonic.umaddl: RewriteMaddl(PrimitiveType.UInt64, m.UMul); break; case Mnemonic.umax: RewriteSimdBinary("__umax_{0}", Domain.UnsignedInt); break; case Mnemonic.umaxp: RewriteSimdBinary("__umaxp_{0}", Domain.UnsignedInt); break; case Mnemonic.umaxv: RewriteSimdUnary("__umaxv_{0}", Domain.UnsignedInt); break; case Mnemonic.umin: RewriteSimdBinary("__umin_{0}", Domain.UnsignedInt); break; case Mnemonic.uminp: RewriteSimdBinary("__uminp_{0}", Domain.UnsignedInt); break; case Mnemonic.uminv: RewriteSimdUnary("__uminv_{0}", Domain.UnsignedInt); break; case Mnemonic.umlal: RewriteSimdTrinary(Domain.UnsignedInt); break; case Mnemonic.umlal2: RewriteSimdTrinary(Domain.UnsignedInt); break; case Mnemonic.umlsl: RewriteSimdTrinary(Domain.UnsignedInt); break; case Mnemonic.umlsl2: RewriteSimdTrinary(Domain.UnsignedInt); break; case Mnemonic.umov: RewriteVectorElementToScalar(Domain.UnsignedInt); break; case Mnemonic.umulh: RewriteMulh(PrimitiveType.UInt64, m.UMul); break; case Mnemonic.umull: RewriteMull(PrimitiveType.UInt32, PrimitiveType.UInt64, m.UMul); break; case Mnemonic.umull2: RewriteSimdBinary("__umull2_{0}", Domain.UnsignedInt); break; case Mnemonic.uqadd: RewriteSimdBinary("__uqadd_{0}", Domain.UnsignedInt); break; case Mnemonic.uqrshl: RewriteSimdBinary("__uqrshl_{0}", Domain.UnsignedInt); break; case Mnemonic.uqrshrn: RewriteSimdBinary("__uqrshrn_{0}", Domain.UnsignedInt); break; case Mnemonic.uqrshrn2: RewriteSimdBinary("__uqrshrn2_{0}", Domain.UnsignedInt); break; case Mnemonic.uqshl: RewriteSimdBinary("__uqshl_{0}", Domain.UnsignedInt); break; case Mnemonic.uqshrn: RewriteSimdBinary("__uqshrn_{0}", Domain.UnsignedInt); break; case Mnemonic.uqshrn2: RewriteSimdBinary("__uqshrn2_{0}", Domain.UnsignedInt); break; case Mnemonic.uqsub: RewriteSimdBinary("__uqsub_{0}", Domain.UnsignedInt); break; case Mnemonic.uqxtn: RewriteSimdUnary("__uqxtn_{0}", Domain.UnsignedInt); break; case Mnemonic.uqxtn2: RewriteSimdUnary("__uqxtn2_{0}", Domain.UnsignedInt); break; case Mnemonic.urecpe: RewriteSimdUnary("__urecpe_{0}", Domain.UnsignedInt); break; case Mnemonic.urhadd: RewriteSimdBinary("__urhadd_{0}", Domain.UnsignedInt); break; case Mnemonic.urshl: RewriteSimdBinary("__urshl_{0}", Domain.UnsignedInt); break; case Mnemonic.urshr: RewriteSimdBinary("__urshr_{0}", Domain.UnsignedInt); break; case Mnemonic.ursqrte: RewriteSimdUnary("__ursqrte_{0}", Domain.UnsignedInt); break; case Mnemonic.ursra: RewriteSimdBinary("__ursra_{0}", Domain.UnsignedInt); break; case Mnemonic.ushl: RewriteMaybeSimdBinary(m.Shr, "__ushl_{0}", Domain.UnsignedInt); break; case Mnemonic.ushll: RewriteMaybeSimdBinary(m.Shr, "__ushll_{0}", Domain.UnsignedInt); break; case Mnemonic.ushll2: RewriteMaybeSimdBinary(m.Shr, "__ushll2_{0}", Domain.UnsignedInt); break; case Mnemonic.ushr: RewriteMaybeSimdBinary(m.Shr, "__ushr_{0}", Domain.UnsignedInt); break; case Mnemonic.usqadd: RewriteSimdBinary("__usqadd_{0}", Domain.UnsignedInt); break; case Mnemonic.usra: RewriteSimdBinary("__usra_{0}", Domain.UnsignedInt); break; case Mnemonic.usubl: RewriteSimdBinary("__usubl_{0}", Domain.UnsignedInt); break; case Mnemonic.usubl2: RewriteSimdBinary("__usubl2_{0}", Domain.UnsignedInt); break; case Mnemonic.usubw: RewriteSimdBinary("__usubw_{0}", Domain.UnsignedInt); break; case Mnemonic.usubw2: RewriteSimdBinary("__usubw2_{0}", Domain.UnsignedInt); break; case Mnemonic.uxtb: RewriteUSxt(Domain.UnsignedInt, 8); break; case Mnemonic.uxth: RewriteUSxt(Domain.UnsignedInt, 16); break; case Mnemonic.uxtl: RewriteSimdUnary("__uxtl_{0}", Domain.UnsignedInt); break; case Mnemonic.uxtl2: RewriteSimdUnary("__uxtl2_{0}", Domain.UnsignedInt); break; case Mnemonic.uxtw: RewriteUSxt(Domain.UnsignedInt, 32); break; case Mnemonic.uzp1: RewriteSimdBinary("__uzp1_{0}", Domain.None); break; case Mnemonic.uzp2: RewriteSimdBinary("__uzp2_{0}", Domain.None); break; case Mnemonic.xtn: RewriteSimdUnary("__xtn_{0}", Domain.None); break; case Mnemonic.xtn2: RewriteSimdUnary("__xtn2_{0}", Domain.None); break; case Mnemonic.zip1: RewriteSimdBinary("__zip1_{0}", Domain.None); break; case Mnemonic.zip2: RewriteSimdBinary("__zip2_{0}", Domain.None); break; } } catch (Exception e) { EmitUnitTest(e.Message); } yield return(m.MakeCluster(instr.Address, instr.Length, iclass)); cluster.Clear(); } }