public void PIC16arch_GetBasicRegisterFromNameTests()
{
PICProcessorModel.GetModel(PIC16BasicName).CreateRegisters();
Assert.AreEqual("STATUS", PICRegisters.GetRegister("STATUS").Name);
Assert.AreEqual("FSR", PICRegisters.GetRegister("FSR").Name);
Assert.AreEqual("INDF", PICRegisters.GetRegister("INDF").Name);
Assert.AreEqual("INTCON", PICRegisters.GetRegister("INTCON").Name);
Assert.AreEqual("WREG", PICRegisters.GetRegister("WREG").Name);
Assert.AreEqual("PCL", PICRegisters.GetRegister("PCL").Name);
Assert.AreEqual("PCLATH", PICRegisters.GetRegister("PCLATH").Name);
Assert.AreEqual("RP", PICRegisters.GetBitField("RP").Name);
}
public void PIC18arch_GetSubregisterTests()
{
var arch = GetArch(PIC18EggName);
PICMemoryDescriptor.ExecMode = PICExecMode.Traditional;
Assert.AreSame(PIC18Registers.FSR0L, arch.GetSubregister(PIC18Registers.FSR0, 0, 8));
Assert.AreSame(PIC18Registers.FSR0H, arch.GetSubregister(PIC18Registers.FSR0, 8, 8));
Assert.AreSame(PIC18Registers.FSR0, arch.GetSubregister(PIC18Registers.FSR0, 0, 16));
PICMemoryDescriptor.ExecMode = PICExecMode.Extended;
Assert.AreSame(PIC18Registers.FSR1L, arch.GetSubregister(PIC18Registers.FSR1, 0, 8));
Assert.AreSame(PIC18Registers.FSR1H, arch.GetSubregister(PIC18Registers.FSR1, 8, 8));
Assert.AreSame(PIC18Registers.FSR2L, arch.GetSubregister(PICRegisters.GetRegister("FSR2"), 0, 8));
Assert.AreSame(PIC18Registers.FSR2H, arch.GetSubregister(PICRegisters.GetRegister("FSR2"), 8, 8));
Assert.AreSame(PIC18Registers.FSR2, arch.GetSubregister(PICRegisters.GetRegister("FSR2"), 0, 16));
}
public void PIC16arch_GetFullFeaturedRegisterFromNameTests()
{
PICProcessorModel.GetModel(PIC16FullFeaturedName).CreateRegisters();
Assert.AreEqual("STATUS", PICRegisters.GetRegister("STATUS").Name);
Assert.AreEqual("FSR1L", PICRegisters.GetRegister("FSR1L").Name);
Assert.AreEqual("FSR1H", PICRegisters.GetRegister("FSR1H").Name);
Assert.AreEqual("FSR0L", PICRegisters.GetRegister("FSR0L").Name);
Assert.AreEqual("FSR0H", PICRegisters.GetRegister("FSR0H").Name);
Assert.AreEqual("FSR0", PICRegisters.GetRegister("FSR0").Name);
Assert.AreEqual("FSR1", PICRegisters.GetRegister("FSR1").Name);
Assert.AreEqual("INDF0", PICRegisters.GetRegister("INDF0").Name);
Assert.AreEqual("INDF1", PICRegisters.GetRegister("INDF1").Name);
Assert.AreEqual("BSR", PICRegisters.GetRegister("BSR").Name);
Assert.AreEqual("WREG", PICRegisters.GetRegister("WREG").Name);
Assert.AreEqual("PCL", PICRegisters.GetRegister("PCL").Name);
Assert.AreEqual("PCLATH", PICRegisters.GetRegister("PCLATH").Name);
}
public override PICInstruction Decode(ushort uInstr, PICDisassemblerBase dasm)
{
// This is a 3-word instruction.
if (!GetAddlInstrWord(dasm.rdr, out ushort word2) || !GetAddlInstrWord(dasm.rdr, out ushort word3))
{
return(new PICInstructionNoOpnd(Opcode.invalid));
}
ushort srcaddr = (ushort)((uInstr.Extract(0, 4) << 10) | word2.Extract(2, 10));
ushort dstaddr = (ushort)(word3.Extract(0, 12) | (word2.Extract(0, 2) << 12));
// PCL, TOSL, TOSH, TOSU are invalid destinations.
if (PICRegisters.NotAllowedDest(dstaddr))
{
return(null);
}
return(new PICInstructionMem2Mem(opcode, srcaddr, dstaddr));
}
public void PIC18arch_GetSubregisterTests()
{
var arch = GetArch(PIC18EggName);
PICMemoryDescriptor.ExecMode = PICExecMode.Traditional;
var lowByte = new BitRange(0, 8);
var highByte = new BitRange(8, 16);
var word = new BitRange(0, 16);
Assert.AreSame(PIC18Registers.FSR0L, arch.GetRegister(PIC18Registers.FSR0.Domain, lowByte));
Assert.AreSame(PIC18Registers.FSR0H, arch.GetRegister(PIC18Registers.FSR0.Domain, highByte));
Assert.AreSame(PIC18Registers.FSR0, arch.GetRegister(PIC18Registers.FSR0.Domain, word));
PICMemoryDescriptor.ExecMode = PICExecMode.Extended;
Assert.AreSame(PIC18Registers.FSR1L, arch.GetRegister(PIC18Registers.FSR1.Domain, lowByte));
Assert.AreSame(PIC18Registers.FSR1H, arch.GetRegister(PIC18Registers.FSR1.Domain, highByte));
Assert.AreSame(PIC18Registers.FSR2L, arch.GetRegister(PICRegisters.GetRegister("FSR2").Domain, lowByte));
Assert.AreSame(PIC18Registers.FSR2H, arch.GetRegister(PICRegisters.GetRegister("FSR2").Domain, highByte));
Assert.AreSame(PIC18Registers.FSR2, arch.GetRegister(PICRegisters.GetRegister("FSR2").Domain, word));
}
public override bool TryGetAbsDataAddress(PICBankedAddress bAddr, out PICDataAddress absAddr)
{
if (bAddr == null)
{
throw new ArgumentNullException(nameof(bAddr));
}
absAddr = null !;
IMemoryRegion?regn = null;
if (PICRegisters.TryGetAlwaysAccessibleRegister(bAddr, out var reg))
{
regn = PICMemoryDescriptor.GetDataRegionByAddress(reg.Traits.RegAddress.Addr !);
}
else if (bAddr.BankSelect.IsValid)
{
regn = GetDataRegionBySelector(bAddr.BankSelect);
}
if (regn != null)
{
absAddr = bAddr.ToDataAddress(regn);
}
return(absAddr != null);
}
public override PICInstruction Decode(ushort uInstr, PICDisassemblerBase dasm)
{
if (PICMemoryDescriptor.ExecMode != PICExecMode.Extended) // PIC not running in Extended Execution mode?
{
return(new PICInstructionNoOpnd(Mnemonic.invalid));
}
// This is a 2-word instruction.
if (!GetAddlInstrWord(dasm.rdr, out ushort fd))
{
return(new PICInstructionNoOpnd(Mnemonic.invalid));
}
// PCL, TOSL, TOSH, TOSU are invalid destinations.
if (PICRegisters.NotAllowedDest(fd))
{
return(new PICInstructionNoOpnd(Mnemonic.invalid));
}
var operzs = (byte)uInstr.Extract(0, 7);
return(new PICInstructionMem2Mem(mnemonic, operzs, fd));
}
public void PIC16Full_GetSubRegisterOfFSR1()
{
Assert.AreSame(PIC16FullRegisters.FSR1L, PICRegisters.GetSubregister(PIC16FullRegisters.FSR1, 0, 8));
Assert.AreSame(PIC16FullRegisters.FSR1H, PICRegisters.GetSubregister(PIC16FullRegisters.FSR1, 8, 8));
}
public void PIC16Enhd_GetSubRegisterOfFSR0()
{
Assert.AreSame(PIC16EnhancedRegisters.FSR0L, PICRegisters.GetSubregister(PIC16EnhancedRegisters.FSR0, 0, 8));
Assert.AreSame(PIC16EnhancedRegisters.FSR0H, PICRegisters.GetSubregister(PIC16EnhancedRegisters.FSR0, 8, 8));
}
