public void unitDispTest()
{
double precision = 0.001;
double[] a = { 1, 2, 21 };
OutputManager outMan = new OutputManager();
SimManager simMan = new SimManager(outMan);
simMan.addMaterialPoint(0, 0, 0, 0, 0, 0, 1, 0);
simMan.addActionPoint(0, 0.5, 1, 10.5);
simMan.CompStep_ = 2;
simMan.increment();
Assert.IsTrue(simMan.sceneElems_[0] - a[0] < precision);
Assert.IsTrue(simMan.sceneElems_[1] - a[1] < precision);
Assert.IsTrue(simMan.sceneElems_[2] - a[2] < precision);
}
public void ApplyTemplate(string name)
{
foreach (LocalizerTemplateSettings t in Templates)
{
if (t.name == name)
{
BaseCfgFile = t.BaseCfgFile;
LanguageCodes = t.LanguageCodes;
AddLanguageCodePrefixToMultiFiles = t.AddLanguageCodePrefixToMultiFiles;
UseMultiCfgFiles = t.UseMultiCfgFiles;
UseMultiAndBaseCfgFiles = t.UseMultiAndBaseCfgFiles;
MultiCfgFile = t.MultiCfgFile;
return;
}
}
OutputManager.WriteLine("Template not found in settings:" + name);
}
/// <summary>
/// Starts the Runner. The Runner does not start automatically, because it waits for an event to start it.
/// </summary>
/// <param name="currentSession"></param>
void StartExperiment(Session currentSession)
{
if (!FinishedInitialization)
{
throw new NullReferenceException("Experiment started before FinishedInitialization");
}
Running = true;
outputManager = new OutputManager(currentSession.OutputFullPath);
Debug.Log("Starting Runner");
ExperimentEvents.ExperimentStarted();
StartCoroutine(ConfigFile.ControlSettings.Run());
ExperimentEvents.StartPart(experiment);
}
private BusinessObjects()
{
OutputManager = new OutputManager();
ScheduleManager = new MediaScheduleManager();
ScheduleTemplatesManager = new ScheduleTemplatesManager();
SolutionsManager = new SolutionsManager();
SlideManager = new SlideManager();
HelpManager = new HelpManager();
ThemeManager = new ThemeManager();
ConfigManager = new ConfigManager();
TextResourcesManager = new TextResourcesManager();
ImageResourcesManager = new ImageResourcesManager();
PowerPointManager = new PowerPointManager <PowerPointSingletonProcessor>();
BrowserManager = new BrowserManager();
IdleManager = new ApplicationIdleManager();
AdditionalInitializator = new AdditionalInitializationDispatcher();
}
protected override void DoCommandAction()
{
// TODO move to parser
VHDLParser vhdlParser = new VHDLParser(VHDLModule);
foreach (VHDLParserEntity ent in vhdlParser.GetEntities())
{
OutputManager.WriteVHDLOutput("-- component declaration for module " + ent.EntityName);
OutputManager.WriteVHDLOutput("component " + ent.EntityName + " is port (");
for (int i = 0; i < ent.InterfaceSignals.Count; i++)
{
// weiter: invertieren und dann auch signal mapping bei instasntiierung abgleichen
OutputManager.WriteVHDLOutput("\t" + ent.InterfaceSignals[i].WholeSignalDeclaration + (i < ent.InterfaceSignals.Count - 1 ? ";" : ");"));
}
OutputManager.WriteVHDLOutput("end component;");
OutputManager.WriteVHDLOutput("");
}
}
protected override void DoCommandAction()
{
if (!FPGA.FPGA.Instance.Contains(Location))
{
throw new ArgumentException("Tile " + Location + " not found");
}
Tile where = FPGA.FPGA.Instance.GetTile(Location);
foreach (Wire wire in where.WireList)
{
if ((wire.LocalPipIsDriver && PrintBeginPips) || (!wire.LocalPipIsDriver && PrintEndPips))
{
string nextLine = wire.LocalPip + ";" + wire.XIncr + ";" + wire.YIncr + ";" + wire.PipOnOtherTile;
OutputManager.WriteOutput(nextLine);
}
}
}
private void CheckForUnblockedPorts(Tile tile)
{
foreach (Port driver in tile.SwitchMatrix.Ports.Where(p =>
!BlockerSettings.Instance.SkipPort(p) &&
!tile.IsPortBlocked(p) &&
!GetRegex(UnblockedPortsToIgnore).IsMatch(p.Name)))
{
// exit
Port exitPort = tile.SwitchMatrix.GetDrivenPorts(driver).FirstOrDefault(p =>
!BlockerSettings.Instance.SkipPort(p) &&
!tile.IsPortBlocked(p) &&
!GetRegex(UnblockedPortsToIgnore).IsMatch(p.Name)
);
if (exitPort != null)
{
Location otherInterconnect = Navigator.GetDestinations(tile, exitPort).FirstOrDefault(l =>
IdentifierManager.Instance.IsMatch(l.Tile.Location, IdentifierManager.RegexTypes.Interconnect));
if (otherInterconnect != null)
{
OutputManager.WriteWarning("Possible violaton on " + tile.Location + ": " + driver.Name + "->" + exitPort.Name);
foreach (Tuple <Port, Port> blockingArc in tile.SwitchMatrix.GetAllArcs().Where(a =>
!BlockerSettings.Instance.SkipPort(a.Item1) &&
!tile.IsPortBlocked(a.Item1) &&
a.Item2.Name.Equals(exitPort.Name)))
{
OutputManager.WriteWarning(" use " + blockingArc.ToString());
}
}
}
Port tunnelPort = tile.SwitchMatrix.GetDrivenPorts(driver).FirstOrDefault(p =>
!BlockerSettings.Instance.SkipPort(p) &&
tile.IsPortBlocked(p, Tile.BlockReason.ExcludedFromBlocking) &&
!GetRegex(UnblockedPortsToIgnore).IsMatch(p.Name)
);
if (tunnelPort != null)
{
OutputManager.WriteWarning("Possible connection into tunnel on " + tile.Location + ": " + driver.Name + "->" + tunnelPort.Name);
}
}
}
private void TraverseBackwards(LibraryElement element, Tile clb, Tile interconnect, BELInfo info)
{
List <string> lutPortNames = new List <string>();
// see LUTRouting tab
for (int i = 1; i <= info.type.inputNames.Count; i++)
{
lutPortNames.Add(info.inputPortPrefix + i);
}
foreach (string s in lutPortNames)
{
// travers backwards into INT
foreach (Tuple <Port, Port> t in clb.SwitchMatrix.GetAllArcs().Where(a => a.Item2.Name.EndsWith(s)))
{
element.AddPortToBlock(clb, t.Item1);
element.AddPortToBlock(clb, t.Item2);
if (interconnect.WireList == null)
{
OutputManager.WriteWarning("No wire list found on " + interconnect.Location);
}
else
{
foreach (Wire w in interconnect.WireList.Where(w => w.PipOnOtherTile.Equals(t.Item1.Name)))
{
element.AddPortToBlock(interconnect, new FPGA.Port(w.LocalPip));
}
}
}
}
// we always need to exclude the port from the LUT output from blocking
// assuming name
foreach (Tuple <Port, Port> t in clb.SwitchMatrix.GetAllArcs().Where(a => a.Item1.Name.EndsWith(info.outputPort)))
{
// no realy neccessary
element.AddPortToBlock(clb, t.Item1);
element.AddPortToBlock(clb, t.Item2);
foreach (Wire w in clb.WireList.Where(w => w.LocalPip.Equals(t.Item2.Name)))
{
element.AddPortToBlock(interconnect, new Port(w.PipOnOtherTile));
}
}
}
protected override void DoCommandAction()
{
//Opens a file and serializes m_fpga into it in binary format.
Stream stream = null;
string elementName = Path.GetFileNameWithoutExtension(FileName);
try
{
stream = File.OpenRead(FileName);
BinaryFormatter formatter = new BinaryFormatter();
m_loadedElement = (Objects.LibraryElement)formatter.Deserialize(stream);
// store how the element was added
m_loadedElement.LoadCommand = ToString();
// rename library element accorindg to file name
m_loadedElement.Name = elementName;
Objects.Library.Instance.Add(m_loadedElement);
try
{
string str = m_loadedElement.ToString();
}
catch (NullReferenceException)
{
OutputManager.WriteWarning("The binary libray element " + FileName + " seems to be out of date. Regenerate it by reading in the XDL version with the command AddXDLLibraryElement");
}
}
catch (Exception error)
{
throw new ArgumentException("Could not open library element: " + error.Message);
}
finally
{
if (stream != null)
{
stream.Close();
}
}
}
private void PrintAreaGroupForVivado()
{
//create_pblock ag1;
//resize_pblock [get_pblocks ag1] -add {SLICE_X0Y44:SLICE_X27Y20
string pBlockName = Regex.Replace(InstanceName, @"\*", "");
pBlockName = "pb_" + pBlockName;
OutputManager.WriteTCLOutput("create_pblock " + pBlockName + "; # generated_by_GoAhead");
//this.PrintAreaConstraintForResourceType(IdentifierManager.RegexTypes.CLB, new int[] { 0, 1 }, pBlockName);
//this.PrintAreaConstraintForResourceType(IdentifierManager.RegexTypes.BRAM, new int[] { 0, 0, 1, 1 }, pBlockName);
//this.PrintAreaConstraintForResourceType(IdentifierManager.RegexTypes.DSP, new int[] { 0, 0 }, pBlockName);
PrintAreaConstraintForResourceType(IdentifierManager.RegexTypes.CLB, new int[] { 0, 0 }, pBlockName);
PrintAreaConstraintForResourceType(IdentifierManager.RegexTypes.BRAM, new int[] { 0, 0, 1, 1 }, pBlockName);
PrintAreaConstraintForResourceType(IdentifierManager.RegexTypes.DSP, new int[] { 0, 0, 1, 1 }, pBlockName);
OutputManager.WriteTCLOutput("add_cells_to_pblock [get_pblocks " + pBlockName + "] [get_cells " + InstanceName + "]; # generated_by_GoAhead");
}
protected override void DoCommandAction()
{
var tiles = TileSelectionManager.Instance.GetSelectedTiles();
if (IncludeStopoverTag)
{
foreach (Tile tile in tiles.Where(t => t.HasBlockedPorts))
{
OutputManager.WriteOutput(tile.Location);
}
}
else
{
foreach (Tile tile in tiles.Where(t => t.HasNonstopoverBlockedPorts))
{
OutputManager.WriteOutput(tile.Location);
}
}
}
private void PrintAreaGroupForISE()
{
//INST “*reconfig_blue*” AREA_GROUP = "pblock_reconfig_blue";
//AREA_GROUP "pblock_reconfig_blue" RANGE = SLICE_X28Y64:SLICE_X33Y67;
string groupName = Regex.Replace(InstanceName, @"\*", "");
groupName = "AG_" + groupName;
string firstLine = "INST \"" + InstanceName + "\" AREA_GROUP = \"" + groupName + "\"; # generated_by_GoAhead";
OutputManager.WriteUCFOutput(firstLine);
PrintAreaConstraintForResourceType(IdentifierManager.RegexTypes.CLB, new int[] { 0, 1 }, groupName);
PrintAreaConstraintForResourceType(IdentifierManager.RegexTypes.BRAM, new int[] { 0, 0, 1, 1 }, groupName);
PrintAreaConstraintForResourceType(IdentifierManager.RegexTypes.DSP, new int[] { 0, 0 }, groupName);
OutputManager.WriteUCFOutput("AREA_GROUP \"" + groupName + "\" GROUP=CLOSED; # generated_by_GoAhead");
OutputManager.WriteUCFOutput("AREA_GROUP \"" + groupName + "\" PLACE=CLOSED; # generated_by_GoAhead");
}
/// <summary>Gets the user interaction result.</summary>
/// <param name="runtimeStory"></param>
/// <param name="parsedFiction"></param>
/// <param name="options">The options.</param>
/// <returns></returns>
public virtual UserInteractionResult GetUserInteractionResult(Runtime.IStory runtimeStory, Parsed.IFiction parsedFiction, ConsoleUserInterfaceOptions options)
{
var uiResult = new UserInteractionResult();
OutputManager.RequestInput(options);
var userInput = OutputManager.GetUserInput();
// If we have null user input, it means that we're
// "at the end of the stream", or in other words, the input
// stream has closed, so there's nothing more we can do.
// We return immediately, since otherwise we get into a busy
// loop waiting for user input.
if (userInput == null)
{
OutputManager.ShowStreamError(options);
uiResult.IsInputStreamClosed = true;
}
else
{
var result = Interpreter.InterpretCommandLineInput(userInput, parsedFiction, runtimeStory);
if (result == null)
{
return(null);
}
ProcessCommandLineInputResult(uiResult, result, runtimeStory);
if (uiResult.Output != null)
{
OutputManager.ShowOutputResult(result, options);
}
if (!uiResult.IsValidChoice)
{
// The choice is only valid if it's a valid index.
OutputManager.ShowChoiceOutOffRange(options);
}
}
return(uiResult);
}
/// <summary>Evaluates the story.</summary>
/// <param name="story">The story.</param>
/// <param name="options">The options.</param>
public virtual void EvaluateStory(IStory story, ConsoleUserInterfaceOptions options)
{
if (story == null || options == null)
{
return;
}
while (story.canContinue)
{
EvaluateNextStoryLine(story, options);
}
bool isKeepRunningAfterStoryFinishedNeeded = options != null ? options.IsKeepRunningAfterStoryFinishedNeeded : false;
if (!story.HasCurrentChoices && isKeepRunningAfterStoryFinishedNeeded)
{
OutputManager.ShowEndOfStory(options);
}
}
private bool InitSubSystem(Dictionary <string, string> gameOptions)
{
appStateMgr = new AppStateManager();
locateMgr = LocateSystem.Singleton;
modMgr = new ModManager();
networkMgr = new NetworkManager();
outputMgr = new OutputManager();
soundMgr = new SoundManager();
uiMgr = new ScreenManager();
SoundManager.Instance.InitSystem(gameOptions["EnableMusic"] == "True" ? true : false, gameOptions["EnableSound"] == "True" ? true : false);
Update += modMgr.Update;
Update += outputMgr.Update;
Update += soundMgr.Update;
Update += uiMgr.Update;
return(true);
}
protected override void DoCommandAction()
{
if (!File.Exists(VHDlFile))
{
throw new ArgumentException(VHDlFile + " does not exits");
}
//open,in,East,pr0,0;
VHDLParser parser = new VHDLParser(VHDlFile);
foreach (VHDLParserEntity entity in parser.GetEntities())
{
Dictionary <FPGA.FPGATypes.Direction, StringBuilder> interfaces = new Dictionary <FPGA.FPGATypes.Direction, StringBuilder>();
foreach (HDLEntitySignal signal in entity.InterfaceSignals.Where(s => s.MetaData != null))
{
if (!interfaces.ContainsKey(signal.MetaData.Direction))
{
interfaces.Add(signal.MetaData.Direction, new StringBuilder());
}
foreach (string csvString in GetCSVString(entity, signal, signal.MetaData.Direction))
{
interfaces[signal.MetaData.Direction].AppendLine(csvString);
}
}
foreach (HDLEntitySignal signal in entity.InterfaceSignals.Where(s => s.MetaData == null))
{
}
OutputManager.WriteOutput("############################################");
OutputManager.WriteOutput("# interface derived from entity " + entity.EntityName);
OutputManager.WriteOutput("############################################");
foreach (KeyValuePair <FPGA.FPGATypes.Direction, StringBuilder> tupel in interfaces)
{
OutputManager.WriteOutput("# " + tupel.Key);
OutputManager.WriteOutput(tupel.Value.ToString());
}
OutputManager.WriteOutput("############################################");
OutputManager.WriteOutput("# end of interface for entity " + entity.EntityName);
OutputManager.WriteOutput("############################################");
}
}
private async void IndexPageViewModel_PropertyChanged(object sender, PropertyChangedEventArgs e)
{
if (e.PropertyName == nameof(this.SelectedJobInfo) && this.SelectedJobInfo != null)
{
if (this.SelectedJobInfo.SbLog.Count == 0)
{
var fileName = SelectedJobInfo.Name + ".log";
var str = await OutputManager.ReadOutput(fileName);
if (!string.IsNullOrEmpty(str))
{
var strList = str.Split('\n');
this.SelectedJobInfo.SbLog = new ObservableCollection <string>(strList);
}
}
}
}
protected override void DoCommandAction()
{
Regex BELRegexp = new Regex(BELs, RegexOptions.Compiled);
foreach (Tile tile in TileSelectionManager.Instance.GetSelectedTiles())
{
foreach (Slice slice in tile.Slices)
{
foreach (string bel in slice.Bels.Where(b => BELRegexp.IsMatch(b)))
{
string instName = slice.SliceName + "_" + bel;
OutputManager.WriteOutput("create_cell -reference FDRE "+ instName);
OutputManager.WriteOutput("place_cell " + instName + " " + slice.SliceName + "/" + bel);
OutputManager.WriteOutput("create_pin -direction IN " + instName + "/" + ClockPin);
OutputManager.WriteOutput("connect_net -hier -net " + ClockNetName + " -objects {" + instName + "/" + ClockPin + "}");
}
}
}
}
public override async Task <IGenesisExecutionResult> Execute(GenesisContext genesis, string[] args)
{
var result = new BlankGenesisExecutionResult()
{
Success = true, Message = ""
};
Text.Line();
Text.YellowLine("Scanning for Inputs:");
await InputManager.InitializeInputsAsync(true);
Text.Line();
Text.YellowLine("Scanning for Outputs:");
await OutputManager.InitializeGeneratorsAsync(true);
Text.Line();
Text.YellowLine("Scanning for General Executors: ");
await GeneralManager.InitializeGeneratorsAsync(true);
Text.Line();
Console.ForegroundColor = (InputManager.Inputs.Count > 0) ? ConsoleColor.Green : ConsoleColor.Yellow;
Text.White($@"{InputManager.Inputs.Count}");
Text.WhiteLine($" Potential Input(s)");
Console.ForegroundColor = (OutputManager.Outputs.Count > 0) ? ConsoleColor.Green : ConsoleColor.Yellow;
Text.White($"{OutputManager.Outputs.Count}");
Text.WhiteLine(" Possible Output(s)");
Console.ForegroundColor = (GeneralManager.Current.Count > 0) ? ConsoleColor.Green : ConsoleColor.Yellow;
Text.White($"{GeneralManager.Current.Count}");
Text.WhiteLine(" General Executor(s)");
Text.Line();
Text.White("The "); Text.Green("green"); Text.WhiteLine(" text is how you reference an Executor. ");
Text.Line();
genesis.ScanCount++;
return(await Task.FromResult(result));
}
static void Main(string[] args)
{
OutputManager outMan = new OutputManager();
SimManager simMan = new SimManager(outMan);
OutputPanelVM outpan = new OutputPanelVM();
outMan.link(new DisplayVM(), new FileModel(outMan), outpan, simMan);
double precision = 0.0001;
simMan.CompStep_ = 2;
simMan.Duration_ = 5;
simMan.accuracyMode = true;
outpan.fromSim = true;
outpan.EnableLog = true;
outpan.DisplayEnbld = false;
outpan.DisplayStep = "1";
outpan.TargetFile = "C:\\Users\\Doz\\Source\\Repos\\Physics_Simulator\\ConsoleEntryPoint\\UnitTestOutputFile.txt";
bool temp = false;
if (!System.IO.File.Exists(outpan.TargetFile))
{
temp = true; System.IO.File.Create(outpan.TargetFile);
}
simMan.addMaterialPoint(0, 0, 0, 0, 0, 0, 1, 0);
simMan.addActionPoint(0, 0.5, 1, 10.5);
outMan.launch();
string content = System.IO.File.ReadLines(outpan.TargetFile).Last();
var sp = content.Split();
double t = Double.Parse(sp[0]);
double x = Double.Parse(sp[2]);
double y = Double.Parse(sp[3]);
double z = Double.Parse(sp[4]);
if (temp == true)
{
System.IO.File.Delete(outpan.TargetFile);
}
}
protected override void DoCommandAction()
{
LibraryElement libEl = Objects.Library.Instance.GetElement(LibraryElementName);
List <Tile> anchors = new List <Tile>();
foreach (Tile placePos in TileSelectionManager.Instance.GetSelectedTiles().Where(t => IdentifierManager.Instance.IsMatch(t.Location, IdentifierManager.RegexTypes.CLB)))
{
StringBuilder errorList = null;
bool placementOk = DesignRuleChecker.CheckLibraryElementPlacement(placePos, libEl, out errorList);
if (placementOk)
{
anchors.Add(placePos);
}
}
foreach (Tile t in anchors)
{
OutputManager.WriteOutput("Libary element " + libEl.Name + " can be placed at " + t.Location);
}
}
protected override void DoCommandAction()
{
NetlistContainer netlistContainer = GetNetlistContainer();
int numberOfUnroutedNets = netlistContainer.Nets.Where(n => n.PipCount == 0 && n.OutpinCount == 1 && n.InpinCount > 0).Count();
int routedNets = 0;
List <XDLNet> unrouteableNets = new List <XDLNet>();
foreach (XDLNet unroutedNet in netlistContainer.Nets.Where(n => n.PipCount == 0 && n.OutpinCount == 1 && n.InpinCount > 0))
{
int pipCount = unroutedNet.PipCount;
RouteNet routeCmd = new RouteNet();
routeCmd.NetlistContainerName = NetlistContainerName;
routeCmd.NetName = unroutedNet.Name;
routeCmd.SearchMode = SearchMode;
CommandExecuter.Instance.Execute(routeCmd);
// pip count did not change if no paht was found
if (pipCount == unroutedNet.PipCount)
{
unrouteableNets.Add(unroutedNet);
}
ProgressInfo.Progress = ProgressStart + (int)((double)routedNets++ / (double)numberOfUnroutedNets * ProgressShare);
}
foreach (XDLNet net in unrouteableNets)
{
RouteNet routeCmd = new RouteNet();
routeCmd.NetlistContainerName = NetlistContainerName;
routeCmd.NetName = net.Name;
routeCmd.SearchMode = SearchMode;
OutputManager.WriteOutput(routeCmd.ToString());
CommandExecuter.Instance.Execute(routeCmd);
}
}
protected override void DoCommandAction()
{
string componentPrefix = "static_placeholder_";
string entityName = "partial_master";
OutputManager.WriteVHDLOutput("library IEEE;");
OutputManager.WriteVHDLOutput("use IEEE.STD_LOGIC_1164.ALL;");
OutputManager.WriteVHDLOutput("");
OutputManager.WriteVHDLOutput("use work.config.all;");
OutputManager.WriteVHDLOutput("");
OutputManager.WriteVHDLOutput("entity " + entityName + " is port (");
OutputManager.WriteVHDLOutput("\t" + "clk : in std_logic);");
OutputManager.WriteVHDLOutput("end " + entityName + ";");
OutputManager.WriteVHDLOutput("");
OutputManager.WriteVHDLOutput("architecture module_implementation of " + entityName + " is");
OutputManager.WriteVHDLOutput("");
// out parameters to UpdateSignalData
Dictionary <string, List <int> > signalWidths;
Dictionary <string, string> directions;
List <Tuple <string, List <int> > > interfaces;
List <string> ifSignals;
List <string> signalsForInterface;
List <string> signalsDeclarationsForMappingAndKeep;
for (int i = 0; i < PartialAreaNames.Count; i++)
{
UpdateSignalData(PartialAreaNames[i], out signalWidths, out directions, out interfaces, out ifSignals, out signalsForInterface, out signalsDeclarationsForMappingAndKeep);
// comp decl
OutputManager.WriteVHDLOutput("-- the declaration of the placeholder for the static system");
OutputManager.WriteVHDLOutput("component " + componentPrefix + PartialAreaNames[i] + " is port (");
foreach (string s in signalsForInterface)
{
OutputManager.WriteVHDLOutput("\t" + s);
}
OutputManager.WriteVHDLOutput("end component;");
OutputManager.WriteVHDLOutput("");
}
}
public static void addEnergy(int add, bool character)
{
OutputManager.AddedEnergy();
if (character)
{
energyWhite = energyWhite + add;
if (energyWhite > maxEnergyWhite)
{
energyWhite = maxEnergyWhite;
}
}
else
{
energyBlack = energyBlack + add;
if (energyBlack > maxEnergyBlack)
{
energyBlack = maxEnergyBlack;
}
}
}
protected override void DoCommandAction()
{
Dictionary <string, int> cmds = new Dictionary <string, int>();
TextReader tr = new StreamReader(CommandCoverageFile);
string line = "";
while ((line = tr.ReadLine()) != null)
{
string[] atoms = Regex.Split(line, ";");
string cmdName = atoms[0];
int cmdCount = int.Parse(atoms[1]);
cmds[cmdName] = cmdCount;
}
tr.Close();
foreach (Type type in CommandStringParser.GetAllCommandTypes().Where(t => !cmds.ContainsKey(t.Name)).OrderBy(t => t.Name))
{
OutputManager.WriteOutput("Command " + type.Name + " is uncovered");
}
}
protected override void OnStart(string[] args)
{
// Load configuration
string configPath = "";
string translationsPath = "";
if (args != null)
{
// Skip first command line argument, as it is the current directory
if (args.Length > 1)
{
configPath = args[1];
}
// Second argument is translations file
if (args.Length > 2)
{
translationsPath = args[2];
}
}
// Setup scoring manager
ScoringManager.Setup();
// Start up configuration
ConfigurationManager.Startup(configPath);
// Start up translation manager
TranslationManager.Startup(translationsPath);
// Setup output manager
OutputManager.Setup();
// Create thread with loop function
LoopThread = new Thread(Loop);
// Run thread
IsRunning = true;
LoopThread.Start();
}
protected override void DoCommandAction()
{
OutputManager.WriteOutput("# e.g. expect outpin left_3 SLICE_X5Y83 CMUX static_to_partial 5 -> expect vector index 5 in netname");
OutputManager.WriteOutput("# e.g. expect outpin left_5 SLICE_X342Y283 AMUX static_to_partial x -> no vector");
foreach (LibElemInst inst in LibraryElementInstanceManager.Instance.GetAllInstantiations().Where(i => Regex.IsMatch(i.InstanceName, InstantiationFilter)))
{
LibraryElement libElement = Objects.Library.Instance.GetElement(inst.LibraryElementName);
OutputManager.WriteOutput("# expected ports for instance " + inst.InstanceName + " (instance of " + libElement.Name + ")");
foreach (XDLPort port in libElement.Containter.Ports)
{
// only consider external ports
bool hasKindMapping = inst.PortMapper.HasKindMapping(port.ExternalName);
if (hasKindMapping)
{
PortMapper.MappingKind mappingKind = inst.PortMapper.GetMapping(port.ExternalName);
if (mappingKind != PortMapper.MappingKind.External)
{
continue;
}
}
bool hasMapping = inst.PortMapper.HasSignalMapping(port.ExternalName);
string inoutPin = port.Direction == FPGA.FPGATypes.PortDirection.In ? "inpin" : "outpin";
string portName = hasMapping ? inst.PortMapper.GetSignalName(port.ExternalName) : "unknown";
string index = inst.PortMapper.HasIndex(port.ExternalName) ? inst.PortMapper.GetIndex(port.ExternalName).ToString() : "-1";
if (portName.Equals("1"))
{
index = "0";
}
string line = "expect " + inoutPin + " " + inst.InstanceName + " " + inst.SliceName + " " + port.SlicePort + " " + portName + " " + index;
OutputManager.WriteOutput(line);
}
}
}
protected override void DoCommandAction()
{
if (IdentifierManager.Instance.IsMatch(Location, IdentifierManager.RegexTypes.CLB))
{
Tile where = FPGA.FPGA.Instance.GetTile(Location);
if (SliceNumber >= where.Slices.Count)
{
throw new ArgumentException("Slice index exceeded on " + where);
}
string constraint = "";
if (FPGA.FPGA.Instance.BackendType == FPGATypes.BackendType.ISE)
{
OutputManager.WriteUCFOutput("INST \"" + InstanceName + "\" LOC = \"" + where.Slices[SliceNumber] + "\"; # generated_by_GoAhead");
}
else if (FPGA.FPGA.Instance.BackendType == FPGATypes.BackendType.Vivado)
{
// place_cell inst_PartialSubsystem/inst_3 SLICE_X6Y66/C6LUT
OutputManager.WriteUCFOutput("place_cell " + InstanceName + " " + where.Slices[SliceNumber] + "/" + BEL + "; # generated_by_GoAhead");
// LOCK_PINS can only be applied to LUTs, for UltraScale we used FlipFops as well
if (BEL.EndsWith("LUT"))
{
OutputManager.WriteUCFOutput("set_property LOCK_PINS {I0:A1 I1:A2 I2:A3 I3:A4 I4:A5 I5:A6} [get_cells " + InstanceName + "]; # generated_by_GoAhead");
}
OutputManager.WriteUCFOutput("set_property DONT_TOUCH TRUE [get_cells " + InstanceName + "]; # generated_by_GoAhead");
/*
* // set_property LOC SLICE_X33Y15 [get_cells My_LUT6_inst]
* this.OutputManager.WriteUCFOutput("set_property LOC " + where.Slices[this.SliceNumber] + " [get_cells " + this.InstanceName + "]; # generated_by_GoAhead");
* // set_property LOCK_PINS {I0:A1 I1:A2 I2:A3 I3:A4} [get_cells inst_PartialSubsystem/inst_0]
* this.OutputManager.WriteUCFOutput("set_property LOCK_PINS {I0:A1 I1:A2 I2:A3 I3:A4 I4:A5 I5:A6} [get_cells " + this.InstanceName + "]; # generated_by_GoAhead");
* */
}
// promt ucf to text box
OutputManager.WriteUCFOutput(constraint);
}
}
protected override void DoCommandAction()
{
// UCF/TCL location constraints
foreach (LibElemInst inst in LibraryElementInstanceManager.Instance.GetAllInstantiations().Where(i => Regex.IsMatch(i.InstanceName, InstantiationFilter)))
{
LibraryElement libEl = Objects.Library.Instance.GetElement(inst.LibraryElementName);
PrintLocationConstraint getLoc = new PrintLocationConstraint();
getLoc.Location = inst.AnchorLocation;
getLoc.SliceNumber = inst.SliceNumber;
getLoc.InstanceName = HierarchyPrefix + inst.InstanceName;
getLoc.BEL = libEl.BEL;
getLoc.Mute = Mute;
CommandExecuter.Instance.Execute(getLoc);
// copy output
if (getLoc.OutputManager.HasUCFOutput)
{
OutputManager.WriteWrapperOutput(getLoc.OutputManager.GetUCFOuput());
}
}
}
protected override void DoCommandAction()
{
NetlistContainer nlc = GetNetlistContainer();
foreach (XDLNet net in nlc.Nets)
{
bool netCrossesSelection = false;
foreach (XDLPip pip in net.Pips)
{
Tile t = FPGA.FPGA.Instance.GetTile(pip.Location);
if (TileSelectionManager.Instance.IsSelected(t.TileKey))
{
netCrossesSelection = true;
break;
}
}
if (netCrossesSelection)
{
OutputManager.WriteOutput(net.Name);
}
}
}
