public static void WriteDWord(this IMemoryBus This, ushort seg, ushort offset, uint value) { This.WriteByte(seg, offset, (byte)(value & 0xFF)); This.WriteByte(seg, (ushort)(offset + 1), (byte)((value >> 8) & 0xFF)); This.WriteByte(seg, (ushort)(offset + 2), (byte)((value >> 16) & 0xFF)); This.WriteByte(seg, (ushort)(offset + 3), (byte)((value >> 24) & 0xFF)); }
internal NesEmulator(CompositionContainer container) : base(container) { // Create and connect parts this.cpuBus = new MemoryBus(16, "CPU Bus"); this.ppuBus = new MemoryBus(16, "PPU Bus"); this.cpuRam = new Memory("CPU RAM", this.cpuBus, 0x0000, 0x800); this.cpu = new Ricoh2A03(this.cpuBus); this.loader = new NesRomLoader(this.cpuBus, this.ppuBus, this.cpu.GetInterruptByName("IRQ")); this.ppu = new Ricoh2C02(this.cpu, this.cpuBus, this.ppuBus); // CPU RAM is mirrored between 0x0800 and 0x1FFF this.cpuBus.SetMirroringRange(0x0000, 0x07FF, 0x0800, 0x1FFF); // PPU registers on the CPU bus are mirrored between 0x2008 and 0x3FFFF this.cpuBus.SetMirroringRange(0x2000, 0x2007, 0x2008, 0x3FFF); // Nametable mirrors this.ppuBus.SetMirroringRange(0x2000, 0x2EFF, 0x3000, 0x3EFF); // Palette mirrors this.ppuBus.SetMirroringRange(0x3F00, 0x3F1F, 0x3F20, 0x3FFF); this.Compose(); }
internal MMC1Mapper(IImageReader reader, IMemoryBus cpuBus, IMemoryBus ppuBus) : base(reader, cpuBus, ppuBus) { if (this.Reader.PrgRamSize > MMC1Mapper.PrgRamMaxSize) { throw new ArgumentOutOfRangeException("MMC1 supports a maximum of 32KB of PRG RAM"); } if (this.Reader.PrgRomSize > MMC1Mapper.PrgRomMaxSize) { throw new ArgumentOutOfRangeException("MMC1 supports a maximum of 512KB of PRG ROM"); } if (this.Reader.ChrRomSize > MMC1Mapper.ChrRomMaxSize) { throw new ArgumentOutOfRangeException("MMC1 supports a maximum of 128KB of CHR ROM"); } // Initialize ROM int prgRomSize = this.Reader.PrgRomSize; int prgRamSize = (this.Reader.PrgRamSize != 0) ? this.Reader.PrgRamSize : 0x2000; int chrRomSize = (this.Reader.ChrRomSize != 0) ? this.Reader.ChrRomSize : 0x2000; this.prgRomBanks = prgRomSize / MMC1Mapper.PrgRomBankSize; this.chrRomBanks = chrRomSize / MMC1Mapper.ChrRomBankSize; this.prgRam = new byte[prgRamSize]; this.prgRom = new byte[prgRomSize]; this.chrRom = new byte[chrRomSize]; // Read PRG ROM this.Reader.GetPrgRom(0, this.prgRom, 0, prgRomSize); if (this.Reader.ChrRomSize != 0) { // Read CHR ROM this.Reader.GetChrRom(0, this.chrRom, 0, chrRomSize); } else { // We're using CHR RAM - initialize the masks for the fixed banks this.chrRomLoBankMask = 0x0000; this.chrRomHiBankMask = 0x1000; } this.shiftRegister = 0x10; // 8K bank of PRG RAM at CPU 0x6000 this.MapCpuRange(this, 0x6000, 0x7FFF); // 2 16K banks of PRG ROM at CPU 0x8000 and 0xC000 this.MapCpuRange(this, 0x8000, 0xFFFF); // 2 4K banks of CHR ROM at PPU 0x0000 and 0x1000 this.MapPpuRange(this, 0x0000, 0x1FFF); // Initial state varies, but the last bank of PRG ROM seems to always be mapped // at 0xC000 - see http://forums.nesdev.com/viewtopic.php?t=6766 this.prgRomHiBankMask = (UInt32)(this.prgRomBanks - 1) << 14; }
private bool CF; //carry - nie pamiętam po co ona była public Processor(IMemoryBus memoryBus) { this.memoryBus = memoryBus; R1 = new Register(false, false, false, false, false, false, false, false); R2 = new Register(false, false, false, false, false, false, false, false); A = new Register(false, false, false, false, false, false, false, false); }
public AxROMMapper(IImageReader reader, IMemoryBus cpuBus, IMemoryBus ppuBus) : base(reader, cpuBus, ppuBus) { if (this.Reader.ChrRomSize != 0) { throw new ArgumentOutOfRangeException("AxROM expects CHR RAM!"); } if (this.Reader.PrgRomSize > AxROMMapper.MaxPrgSize) { throw new ArgumentOutOfRangeException("AxROM supports a maximum of 256KB of PRG ROM!"); } // 1 32KB bank of PRG ROM at CPU 0x8000 base.MapCpuRange(this, 0x8000, 0xFFFF); // 8K bank of CHR ROM at PPU 0x0000 base.MapPpuRange(this, 0x0000, 0x1FFF); // Load data from ROM this.prgRom = new byte[this.Reader.PrgRomSize]; this.prgRomBanks = this.Reader.PrgRomSize / AxROMMapper.PrgRomBankSize; this.Reader.GetPrgRom(0, this.prgRom, 0, this.Reader.PrgRomSize); // First bank of PRG ROM is initially mapped at 0x8000 this.prgRomBankMask = (UInt32)((((this.prgRomBanks - 1) & 0x07) % this.prgRomBanks) << 15);; }
private void RunSpriteHitTest(string rom) { IEmulator emulator = this.GetInstance(); emulator.LoadFile(rom); IMemoryBus cpuBus = (IMemoryBus)emulator.Components.First(c => c.Name == "CPU Bus"); IComponentWithBreakpoints cpuBusBP = (IComponentWithBreakpoints)cpuBus; bool testComplete = false; // This is kind of a hack - the test ROMs set 0xF8 to the number of the test that failed, or 1 // if all tests pass, but it's incremented as the tests run. To determine when the test run // is over, look for a write to 0x07F1, which happens in the routine that prints the results, // and check 0xF8 at that point. IMemoryBreakpoint memBP = (IMemoryBreakpoint)cpuBusBP.CreateBreakpoint("MemoryBreakpoint"); memBP.TargetAddress = 0x07F1; memBP.AccessType = AccessType.Write; memBP.BreakpointHit += (sender, e) => { testComplete = true; }; memBP.Enabled = true; base.RunEmulator(emulator, () => !testComplete); byte value = cpuBus.Read(0xF8); if (value != 1) { // Non-zero value other than 1 indicates failure Assert.Fail("Test #{0} failed!", value); } }
public InterruptHandler(IMemoryBus memoryBus) { _hardwareIrqList = new List<HardwareInterruptRequest>(); _softwareIrqList = new List<SoftwareInterruptRequest>(); _memoryBus = memoryBus; _memoryBus.MemoryChanged += new EventHandler<MemoryChangedEventArgs>(memoryNotifyer_MemoryChanged); }
public InterruptTriggeredMemoryMappedDevice(IMemoryBus memoryBus, InterruptHandler interruptHandler, String irqName, int memoryRangeStart, int memoryRangeLength) { _memoryBus = memoryBus; this.MemoryRangeStart = memoryRangeStart; this.MemoryRangeLength = memoryRangeLength; interruptHandler.RegisterHardwareInterrupt(irqName, 1048568, 127, true, RefreshInterruptTriggered); }
public InterruptHandler(IMemoryBus memoryBus) { _hardwareIrqList = new List <HardwareInterruptRequest>(); _softwareIrqList = new List <SoftwareInterruptRequest>(); _memoryBus = memoryBus; _memoryBus.MemoryChanged += new EventHandler <MemoryChangedEventArgs>(memoryNotifyer_MemoryChanged); }
public static uint ReadDWord(this IMemoryBus This, ushort seg, ushort offset) { return((uint)( This.ReadByte(seg, offset) | (This.ReadByte(seg, (ushort)(offset + 1)) << 8) | (This.ReadByte(seg, (ushort)(offset + 2)) << 16) | (This.ReadByte(seg, (ushort)(offset + 3)) << 24))); }
internal MMC3Mapper(IImageReader reader, IMemoryBus cpuBus, IMemoryBus ppuBus, IProcessorInterrupt irq) : base(reader, cpuBus, ppuBus) { if (this.Reader.PrgRamSize > MMC3Mapper.PrgRamMaxSize) { throw new ArgumentOutOfRangeException("MMC3 supports a maximum of 8KB of PRG RAM"); } if (this.Reader.PrgRomSize > MMC3Mapper.PrgRomMaxSize) { throw new ArgumentOutOfRangeException("MMC3 supports a maximum of 512KB of PRG ROM"); } if (this.Reader.ChrRomSize > MMC3Mapper.ChrRomMaxSize) { throw new ArgumentOutOfRangeException("MMC3 supports a maximum of 256KB of CHR ROM"); } this.irq = irq; // Initialize ROM int prgRomSize = this.Reader.PrgRomSize; int prgRamSize = (this.Reader.PrgRamSize != 0) ? this.Reader.PrgRamSize : 0x2000; int chrRomSize = (this.Reader.ChrRomSize != 0) ? this.Reader.ChrRomSize : 0x2000; this.prgRomBanks = this.Reader.PrgRomSize / MMC3Mapper.PrgRomBankSize; this.chrRomBanks = (this.Reader.ChrRomSize != 0) ? (this.Reader.ChrRomSize / MMC3Mapper.ChrRomBankSize) : 8; this.prgRam = new byte[prgRamSize]; this.prgRom = new byte[prgRomSize]; this.chrRom = new byte[chrRomSize]; // Read PRG ROM this.Reader.GetPrgRom(0, this.prgRom, 0, prgRomSize); if (this.Reader.ChrRomSize != 0) { // Read CHR ROM this.Reader.GetChrRom(0, this.chrRom, 0, chrRomSize); } // 8K bank of PRG RAM at CPU 0x6000 this.MapCpuRange(this, 0x6000, 0x7FFF); // 2 16K banks of PRG ROM at CPU 0x8000 and 0xC000 this.MapCpuRange(this, 0x8000, 0xFFFF); // 2 2K banks and 4 1K banks of CHR ROM between PPU 0x0000 and 0x1000 this.MapPpuRange(this, 0x0000, 0x1FFF); // Initial state is undefined, except that the last bank of PRG ROM will be mapped from 0xE000 - 0xFFFF this.prgRomBank3Mask = (UInt32)(this.prgRomBanks - 1) << 13; // Set initial nametable mirroring from ROM data as a hack to fix some homebrew that doesn't properly // initialize the mapper base.SetNametableMirroring(this.Reader.Mirroring); }
public KeyboardDevice(IMemoryBus memoryBus, InterruptHandler interruptHandler, int memoryRangeStart, int memoryRangeLength) { this.MemoryRangeStart = memoryRangeStart; this.MemoryRangeLength = memoryRangeLength; _memoryBus = memoryBus; interruptHandler.RegisterSoftwareInterruptQueue("Keyboard request queue", "Keyboard", 1048439, 1048431); }
public static byte[] ReadBytes(this IMemoryBus This, ushort seg, ushort offset, int count) { byte[] buf = new byte[count]; for (int i = 0; i < count; i++) { buf[i] = This.ReadByte(seg, offset++); } return(buf); }
public Memory(string name, IMemoryBus bus, int startAddress, int size) { this.Name = name; this.contents = new byte[size]; this.bus = bus; this.startAddress = startAddress; this.size = size; this.mapping = bus.RegisterMappedDevice(this, startAddress, startAddress + (size - 1)); }
public static T ReadStruct <T>(this IMemoryBus This, uint ptr) { unsafe { var temp = This.ReadBytes(ptr, Marshal.SizeOf(typeof(T))); fixed(byte *p = temp) { return((T)Marshal.PtrToStructure((IntPtr)p, typeof(T))); } } }
public static void WriteBytes(this IMemoryBus This, ushort seg, ushort offset, byte[] bytes, int length = -1) { if (length < 0) { length = bytes.Length; } for (int i = 0; i < length; i++) { This.WriteByte(seg, offset++, bytes[i]); } }
protected MapperBase(IImageReader reader, IMemoryBus cpuBus, IMemoryBus ppuBus) { this.Reader = reader; this.CpuBus = cpuBus; this.PpuBus = ppuBus; this.cpuMappings = new List <IMemoryMapping>(); this.cpuMirrorings = new List <IMemoryMirroring>(); this.ppuMappings = new List <IMemoryMapping>(); this.ppuMirrorings = new List <IMemoryMirroring>(); }
public static void WriteStruct <T>(this IMemoryBus This, ushort seg, ushort offs, ref T value) { unsafe { byte[] temp = new byte[Marshal.SizeOf(typeof(T))]; fixed(byte *p = temp) { Marshal.StructureToPtr(value, (IntPtr)p, false); } This.WriteBytes(seg, offs, temp); } }
internal NesApu(IMemoryBus cpuBus, IProcessorCore cpu) { this.cpuIrq = cpu.GetInterruptByName("IRQ"); this.pulse1 = new PulseChannel(true); this.pulse2 = new PulseChannel(false); this.triangle = new TriangleChannel(); this.noise = new NoiseChannel(); this.dmc = new DeltaChannel(cpuBus, cpuIrq); this.isApuCycle = false; this.buffer = new byte[NesApu.BUFFER_SIZE]; this.ptr = Marshal.AllocHGlobal(4); }
public static async Task PublishDomainEvents <T>(this IMemoryBus memoryBus, T ctx) where T : DbContext { var domainEntities = ctx.ChangeTracker.Entries <Entity>().Where(x => x.Entity.DomainEvents != null && x.Entity.DomainEvents.Any()); var domainEvents = domainEntities.SelectMany(x => x.Entity.DomainEvents).ToList(); domainEntities.ToList().ForEach(entity => entity.Entity.ClearDomainEvents()); var tasks = domainEvents.Select(async(domainEvent) => { await memoryBus.PublishEvent(domainEvent); }); await Task.WhenAll(tasks); }
internal UxROMMapper(IImageReader reader, IMemoryBus cpuBus, IMemoryBus ppuBus, UxRomVariant variant = UxRomVariant.UxROM) : base(reader, cpuBus, ppuBus) { if (this.Reader.ChrRomSize != 0 && this.Reader.ChrRomSize != 8 * 1024) { throw new ArgumentOutOfRangeException("UxROM expects 0 or 8KB of CHR ROM!"); } if (this.Reader.PrgRomSize > UxROMMapper.MaxPrgSize) { throw new ArgumentOutOfRangeException("UxROM supports a maximum of 4MB of PRG ROM!"); } // 2 16KB banks of PRG ROM at CPU 0x8000 and 0xC000 base.MapCpuRange(this, 0x8000, 0xFFFF); // 8K bank of CHR ROM at PPU 0x0000 base.MapPpuRange(this, 0x0000, 0x1FFF); // Load data from ROM this.prgRom = new byte[this.Reader.PrgRomSize]; this.prgRomBanks = this.Reader.PrgRomSize / UxROMMapper.PrgRomBankSize; if (this.Reader.ChrRomSize > 0) { this.Reader.GetChrRom(0, this.chrRom, 0, this.Reader.ChrRomSize); } this.Reader.GetPrgRom(0, this.prgRom, 0, this.Reader.PrgRomSize); base.SetNametableMirroring(this.Reader.Mirroring); // High bank of PRG ROM is always mapped at 0xC000 this.prgRomHiBankMask = (UInt32)(this.prgRomBanks - 1) << 14; switch (variant) { case UxRomVariant.UxROM: this.bankSwitchRegisterAddrRangeStart = 0x8000; this.bankSwitchRegisterAddrRangeEnd = 0xFFFF; break; case UxRomVariant.Camerica71: this.bankSwitchRegisterAddrRangeStart = 0xC000; this.bankSwitchRegisterAddrRangeEnd = 0xFFFF; break; } }
private bool[] _isCellDirty = new bool[Height * CellColumns + 1]; // includes sentinel public Video(MachineEvents events, IMemoryBus memory) { _events = events; _memory = memory; _events.AddEventDelegate(EventCallbacks.FlushRow, FlushRowEvent); _events.AddEventDelegate(EventCallbacks.InverseText, InverseTextEvent); _events.AddEventDelegate(EventCallbacks.LeaveVBlank, LeaveVBlankEvent); _events.AddEventDelegate(EventCallbacks.ResetVsync, ResetVSyncEvent); _flushRowMode = new Action <int>[] { FlushRowMode0, FlushRowMode1, FlushRowMode2, FlushRowMode3, FlushRowMode4, FlushRowMode5, FlushRowMode6, FlushRowMode7, FlushRowMode8, FlushRowMode9, FlushRowModeA, FlushRowModeB, FlushRowModeC, FlushRowModeD, FlushRowModeE, FlushRowModeF }; unchecked { _colorBlack = (int)0xFF000000; // BGRA _colorDarkBlue = (int)0xFF000099; _colorDarkGreen = (int)0xFF117722; _colorMediumBlue = (int)0xFF0000FF; _colorBrown = (int)0xFF885500; _colorLightGrey = (int)0xFF99AAAA; _colorGreen = (int)0xFF00EE11; _colorAquamarine = (int)0xFF55FFAA; _colorDeepRed = (int)0xFFFF1111; _colorPurple = (int)0xFFDD00DD; _colorDarkGrey = (int)0xFF445555; _colorLightBlue = (int)0xFF33AAFF; _colorOrange = (int)0xFFFF4411; _colorPink = (int)0xFFFF9988; _colorYellow = (int)0xFFFFFF11; _colorWhite = (int)0xFFFFFFFF; _colorMonochrome = (int)0xFF00AA00; } SetPalette(); IsMonochrome = false; ScannerOptions = ScannerOptions.None; _isVBlank = true; _events.AddEvent(_cyclesPerVBlankPreset, EventCallbacks.LeaveVBlank); // align flush events with scanner; assumes vcount preset at start of frame [3-15, 3-16] _events.AddEvent(_cyclesPerVSync, EventCallbacks.ResetVsync); _events.AddEvent(_cyclesPerFlash, EventCallbacks.InverseText); }
public static ushort WriteString(this IMemoryBus This, ushort seg, ushort offset, string str, ushort length) { var bytes = Encoding.GetEncoding(1252).GetBytes(str); length = (ushort)Math.Min(bytes.Length, length - 1); // Write string for (int i = 0; i < bytes.Length; i++) { This.WriteByte(seg, offset++, bytes[i]); } // Null terminator This.WriteByte(seg, offset, 0); return(length); }
public static string ReadString(this IMemoryBus This, ushort seg, ushort offset, ushort bufSize) { if (seg == 0 && offset == 0) { return(null); } ushort endPos = offset; while (This.ReadByte(seg, endPos) != 0 && (endPos - offset) < bufSize - 1) { endPos++; } return(Encoding.GetEncoding(1252).GetString(This.ReadBytes(seg, offset, endPos - offset))); }
public void RunCpuTest() { IEmulator emulator = this.GetInstance(); emulator.LoadFile(@"TestRoms\nestest\nestest.nes"); List <string> expectedOutput = new List <string>(File.ReadAllLines(@"TestResources\CpuTests\nestest.expected")); IProcessorCore cpu = (IProcessorCore)emulator.Components.First(c => c.Name == "Ricoh 2A03 CPU"); IComponentWithRegisters ppu = (IComponentWithRegisters)emulator.Components.First(c => c.Name == "Ricoh 2C02 PPU"); IMemoryBus cpuBus = (IMemoryBus)emulator.Components.First(c => c.Name == "CPU Bus"); // Jump to automated test entry point cpu.GetRegisterByName("PC").Value = 0xC000; // Set initial state cpu.GetRegisterByName("S").Value = 0xFD; ppu.GetRegisterByName("cycle").Value = 0; ppu.GetRegisterByName("scanline").Value = 241; IEnumerator <string> outputLineEnumerator = expectedOutput.GetEnumerator(); outputLineEnumerator.MoveNext(); base.RunEmulator(emulator, () => { string state = this.DumpEmulatorState(cpu, ppu, cpuBus); string expectedOutputLine = outputLineEnumerator.Current; if (!expectedOutputLine.StartsWith("#") && !String.Equals(state, expectedOutputLine, StringComparison.Ordinal)) { Debug.WriteLine("**** {0}", (object)state); Debug.WriteLine("Exp: {0}", (object)expectedOutputLine); Assert.Fail("Output mismatch!"); return(false); } Debug.WriteLine(state); return(outputLineEnumerator.MoveNext()); }); }
internal Ricoh2C02(IProcessorCore cpu, IMemoryBus cpuBus, IMemoryBus ppuBus) { this.ppuBus = ppuBus; this.vbi = cpu.GetInterruptByName("NMI"); this.vbiTimer = new Stopwatch(); this.paletteMemory = new byte[0x20]; this.primaryOam = new byte[0x100]; this.secondaryOam = new byte[0x20]; // PPU registers on CPU bus cpuBus.RegisterMappedDevice(this, 0x2000, 0x2007); // Palette data ppuBus.RegisterMappedDevice(this, 0x3F00, 0x3F1F); // Set up power-on state this.SetPpuCtrl(0x00); this.SetPpuMask(0x00); this.SetOamAddr(0x00); this.spriteZeroHit = false; this.spriteOverflow = false; this.isVBlank = false; this.oddFrame = false; this.scanline = -1; this.cycle = 0; this.registers = new ReadOnlyCollection <IRegister>( new IRegister[] { new RegisterWrapper("scanline", "PPU Scanline", 16, () => this.scanline, s => this.scanline = s), new RegisterWrapper("cycle", "PPU Cycle", 16, () => this.cycle, c => this.cycle = c) }); //this.vbiTimer.Start(); }
internal CNROMMapper(IImageReader reader, IMemoryBus cpuBus, IMemoryBus ppuBus) : base(reader, cpuBus, ppuBus) { if (this.Reader.PrgRomSize != 16 * 1024 && this.Reader.PrgRomSize != 32 * 1024) { throw new ArgumentOutOfRangeException("CNROM expects 16 or 32KB of PRG ROM!"); } if (this.Reader.ChrRomSize > CNROMMapper.MaxChrSize) { throw new ArgumentOutOfRangeException("CNROM supports a maximum of 2MB of CHR ROM!"); } // 2 16KB banks of PRG ROM at CPU 0x8000 and 0xC000 base.MapCpuRange(this, 0x8000, 0xFFFF); // 8K bank of CHR ROM at PPU 0x0000 base.MapPpuRange(this, 0x0000, 0x1FFF); // Load data from ROM this.chrRom = new byte[this.Reader.ChrRomSize]; this.chrRomBanks = this.Reader.ChrRomSize / CNROMMapper.ChrRomBankSize; this.Reader.GetChrRom(0, this.chrRom, 0, this.Reader.ChrRomSize); this.Reader.GetPrgRom(0, this.prgRom, 0, 0x4000); if (this.Reader.PrgRomSize == 0x4000) { this.Reader.GetPrgRom(0, this.prgRom, 0x4000, 0x4000); } else { this.Reader.GetPrgRom(0x4000, this.prgRom, 0x4000, 0x4000); } base.SetNametableMirroring(this.Reader.Mirroring); }
internal NROMMapper(IImageReader reader, IMemoryBus cpuBus, IMemoryBus ppuBus) : base(reader, cpuBus, ppuBus) { if (this.Reader.ChrRomSize != 0x2000 && this.Reader.ChrRomSize != 0x0000) { throw new InvalidOperationException("NROM expects 0 or 1 bank of CHR ROM!"); } if (this.Reader.PrgRomSize != 0x4000 && this.Reader.PrgRomSize != 0x8000) { throw new InvalidOperationException("NROM expects 1 or 2 banks of PRG ROM!"); } // 2 16KB banks of PRG ROM at CPU 0x8000 and 0xC000 base.MapCpuRange(this, 0x8000, 0xFFFF); // 8K bank of CHR ROM at PPU 0x0000 base.MapPpuRange(this, 0x0000, 0x1FFF); // Load data from ROM this.Reader.GetPrgRom(0, this.prgRom, 0, 0x4000); if (this.Reader.PrgRomSize == 0x4000) { this.Reader.GetPrgRom(0, this.prgRom, 0x4000, 0x4000); } else { this.Reader.GetPrgRom(0x4000, this.prgRom, 0x4000, 0x4000); } if (this.Reader.ChrRomSize > 0) { this.Reader.GetChrRom(0, this.chrRom, 0, 0x2000); } base.SetNametableMirroring(this.Reader.Mirroring); }
IMapper IMapperFactory.CreateInstance(IImageReader reader, IMemoryBus cpuBus, IMemoryBus ppuBus, IProcessorInterrupt irq) { return(new AxROMMapper(reader, cpuBus, ppuBus)); }
public AdminAppService(IMemoryBus bus) { _bus = bus; }
public GameBoyDevice() { Cpu = new CPU(this); InternalMemory = new Memory(0x10000); // 64 KB }
public Intel8080(IMemoryBus mem, IInputOutputBus iobus) { Memory = mem; IOBus = iobus; }
public ConsoleDevice(IMemoryBus memoryBus, InterruptHandler interruptHandler, int memoryRangeStart, int memoryRangeLength) : base(memoryBus, interruptHandler, "Console refresh trigger", memoryRangeStart, memoryRangeLength) { }