protected override void DoCommandAction()
{
NetlistContainer macro = NetlistContainerManager.Instance.Get(MacroName);
// 1 iterate over all not filtered out tiles to instantiate primitves and to find an outpin
foreach (Tile t in TileSelectionManager.Instance.GetSelectedTiles().Where(t => !BlockerSettings.Instance.SkipTile(t)))
{
// iterate in order
for (int i = 0; i < t.Slices.Count; i++)
{
Slice s = t.Slices[i];
if (!Regex.IsMatch(i.ToString(), SliceNumberPattern) || s.Usage != FPGATypes.SliceUsage.Free)
{
continue;
}
string template = "";
// ignore the SliceNumberPattern given by AddBlockerPrimitveRegexp, this command has its own one
// TODO add AddPrimitveRegexp in addition to AddBlockerPrimitveRegexp
if (BlockerSettings.Instance.InsertTemplate(s.SliceName, true, i, out template))
{
AddTemplateConfig addTemplateCommand = new AddTemplateConfig();
addTemplateCommand.Location = t.Location;
addTemplateCommand.NetlistContainerName = NetlistContainerName;
addTemplateCommand.PrimitiveIndex = i;
addTemplateCommand.Template = template;
CommandExecuter.Instance.Execute(addTemplateCommand);
// attach usage
s.Usage = FPGATypes.SliceUsage.Blocker;
}
}
}
}
private void AddXDLTemplates(NetlistContainer nlc, Net blockerNet, ref bool outPinAdded, ref string outpinLocation)
{
foreach (Tile tile in TileSelectionManager.Instance.GetSelectedTiles().Where(t => !BlockerSettings.Instance.SkipTile(t)))
{
// iterate in order
for (int i = 0; i < tile.Slices.Count; i++)
{
Slice s = tile.Slices[i];
string template = "";
if (BlockerSettings.Instance.InsertTemplate(s.SliceName, false, i, out template))
{
AddTemplateConfig.AddTemplate((XDLContainer)nlc, template, tile.Location, i);
// add outpin
if (!outPinAdded)
{
outpinLocation = tile.Location;
outPinAdded = AddXDLOutpin((XDLNet)blockerNet, tile, SliceNumber);
}
}
}
}
}
