Example #1
0
 public static bool S(ulong uInstr, zSeriesDisassembler dasm)
 {
     var b2 = Registers.GpRegisters[(uInstr >> 12) & 0xF];
     var d2 = (int)Bits.SignExtend(uInstr, 12);
     dasm.ops.Add(dasm.CreateAccess(b2, d2));
     return true;
 }
Example #2
0
        public static bool RIc(ulong uInstr, zSeriesDisassembler dasm)
        {
            var addr = dasm.addr + 2 * (int)Bits.SignExtend(uInstr, 16);

            dasm.state.ops.Add(AddressOperand.Create(addr));
            return(true);
        }
Example #3
0
 public static bool RIb(ulong uInstr, zSeriesDisassembler dasm)
 {
     var addr = dasm.addr + 2 * (int)Bits.SignExtend(uInstr, 16);
     dasm.ops.Add(new RegisterOperand(Registers.GpRegisters[(uInstr >> 20) & 0xF]));
     dasm.ops.Add(AddressOperand.Create(addr));
     return true;
 }
Example #4
0
 public static bool RILb(ulong uInstr, zSeriesDisassembler dasm)
 {
     dasm.ops.Add(new RegisterOperand(Registers.GpRegisters[(uInstr >> 36) & 0xF]));
     var offset = 2 * (int)Bits.SignExtend(uInstr, 32);
     dasm.ops.Add(AddressOperand.Create(dasm.addr + offset));
     return true;
 }
Example #5
0
        public static bool RILc(ulong uInstr, zSeriesDisassembler dasm)
        {
            var offset = 2 * (int)Bits.SignExtend(uInstr, 32);

            dasm.state.ops.Add(AddressOperand.Create(dasm.addr + offset));
            return(true);
        }
Example #6
0
 public override zSeriesInstruction Decode(ulong uInstr, zSeriesDisassembler dasm)
 {
     if (!dasm.rdr.TryReadBeUInt32(out uint uLowWord))
         return dasm.CreateInvalidInstruction();
     ulong uInstrExt = (uInstr << 32) | uLowWord;
     return base.Decode(uInstrExt, dasm);
 }
Example #7
0
 private static bool SI(ulong uInstr, zSeriesDisassembler dasm)
 {
     var i2 = ImmediateOperand.Byte((byte)(uInstr >> 16));
     var b1 = Registers.GpRegisters[(uInstr >> 12) & 0xF];
     var d1 = (int)Bits.SignExtend(uInstr, 12);
     dasm.ops.Add(dasm.CreateAccess(b1, d1));
     dasm.ops.Add(i2);
     return true;
 }
Example #8
0
 public static bool MII(ulong uInstr, zSeriesDisassembler dasm)
 {
     var m1 = (byte)((uInstr >> 36) & 0xF);
     var r2 = (int) Bits.SignExtend((uint)(uInstr >> 24), 12);
     var r3 = (int) Bits.SignExtend((uint)uInstr, 24);
     dasm.ops.Add(ImmediateOperand.Byte(m1));
     dasm.ops.Add(ImmediateOperand.Int32(r2));
     dasm.ops.Add(ImmediateOperand.Int32(r3));
     return true;
 }
Example #9
0
 public static bool FXa(ulong uInstr, zSeriesDisassembler dasm)
 {
     var f1 = new RegisterOperand(Registers.FpRegisters[(uInstr >> 20) & 0xF]);
     var x2 = Registers.GpRegisters[(uInstr >> 16) & 0xF];
     var b2 = Registers.GpRegisters[(uInstr >> 12) & 0xF];
     var d2 = (int)Bits.SignExtend(uInstr, 12);
     dasm.ops.Add(f1);
     dasm.ops.Add(dasm.CreateAccess(b2, x2, d2));
     return true;
 }
Example #10
0
            public override zSeriesInstruction Decode(ulong uInstr, zSeriesDisassembler dasm)
            {
                if (!dasm.rdr.TryReadBeUInt32(out uint uLowWord))
                {
                    return(dasm.Invalid());
                }
                ulong uInstrExt = (uInstr << 32) | uLowWord;

                return(base.Decode(uInstrExt, dasm));
            }
Example #11
0
        public static bool RSa(ulong uInstr, zSeriesDisassembler dasm)
        {
            var r1 = Registers.GpRegisters[(uInstr >> 20) & 0xF];
            var b2 = Registers.GpRegisters[(uInstr >> 12) & 0xF];
            var d2 = (int)Bits.SignExtend(uInstr, 12);

            dasm.state.ops.Add(new RegisterOperand(r1));
            dasm.state.ops.Add(dasm.CreateAccess(b2, d2));
            return(true);
        }
Example #12
0
            public override zSeriesInstruction Decode(ulong uInstr, zSeriesDisassembler dasm)
            {
                if (!dasm.rdr.TryReadBeUInt16(out ushort uLowWord))
                {
                    return(dasm.CreateInvalidInstruction());
                }
                ulong uInstrExt = (uInstr << 16) | uLowWord;

                return(base.Decode(uInstrExt, dasm));
            }
Example #13
0
 private static bool RXYa(ulong uInstr, zSeriesDisassembler dasm)
 {
     var r1 = new RegisterOperand(Registers.GpRegisters[(uInstr >> 36) & 0xF]);
     var x2 = Registers.GpRegisters[(uInstr >> 32) & 0xF];
     var b2 = Registers.GpRegisters[(uInstr >> 28) & 0xF];
     var d2 = Bitfield.ReadSignedFields(rxya_offset, (uint)uInstr);
     dasm.ops.Add(r1);
     dasm.ops.Add(dasm.CreateAccess(b2, x2, d2));
     return true;
 }
Example #14
0
 public static bool RSb(ulong uInstr, zSeriesDisassembler dasm)
 {
     var r1 = Registers.GpRegisters[(uInstr >> 20) & 0xF];
     var m3 = ImmediateOperand.Byte((byte)((uInstr >> 16) & 0xF));
     var b2 = Registers.GpRegisters[(uInstr >> 12) & 0xF];
     var d2 = (int)Bits.SignExtend(uInstr, 12);
     dasm.ops.Add(new RegisterOperand(r1));
     dasm.ops.Add(dasm.CreateAccess(b2, d2));
     dasm.ops.Add(m3);
     return true;
 }
Example #15
0
 private static bool RSYb(ulong uInstr, zSeriesDisassembler dasm)
 {
     var r1 = Registers.GpRegisters[(uInstr >> 36) & 0xF];
     var m3 = (byte)((uInstr >> 32) & 0xF);
     var b2 = Registers.GpRegisters[(uInstr >> 28) & 0xF];
     var d2 = Bitfield.ReadSignedFields(rsya_offset, (uint)uInstr);
     dasm.ops.Add(new RegisterOperand(r1));
     dasm.ops.Add(ImmediateOperand.Byte(m3));
     dasm.ops.Add(dasm.CreateAccess(b2, d2));
     return true;
 }
Example #16
0
 public static bool SSf(ulong uInstr, zSeriesDisassembler dasm)
 {
     var l2 = (byte)(uInstr >> 32);
     var b1 = Registers.GpRegisters[(uInstr >> 28) & 0xF];
     var d1 = (int)Bits.SignExtend(uInstr >> 16, 12);
     var b2 = Registers.GpRegisters[(uInstr >> 12) & 0xF];
     var d2 = (int)Bits.SignExtend(uInstr, 12);
     dasm.ops.Add(dasm.CreateAccess(b1, d1));
     dasm.ops.Add(dasm.CreateAccessLength(b2, d2, l2 + 1));
     return true;
 }
Example #17
0
        private static bool RSYa(ulong uInstr, zSeriesDisassembler dasm)
        {
            var r1 = Registers.GpRegisters[(uInstr >> 36) & 0xF];
            var r3 = Registers.GpRegisters[(uInstr >> 32) & 0xF];
            var b2 = Registers.GpRegisters[(uInstr >> 28) & 0xF];
            var d2 = Bitfield.ReadSignedFields(rsya_offset, (uint)uInstr);

            dasm.state.ops.Add(new RegisterOperand(r1));
            dasm.state.ops.Add(new RegisterOperand(r3));
            dasm.state.ops.Add(dasm.CreateAccess(b2, d2));
            return(true);
        }
Example #18
0
 public override zSeriesInstruction Decode(ulong uInstr, zSeriesDisassembler dasm)
 {
     dasm.state.opcode = opcode;
     foreach (var m in mutators)
     {
         if (!m(uInstr, dasm))
         {
             return(dasm.Invalid());
         }
     }
     return(dasm.state.MakeInstruction());
 }
Example #19
0
 public static bool SSd(ulong uInstr, zSeriesDisassembler dasm)
 {
     var r1 = Registers.GpRegisters[(uInstr >> 36) & 0xF];
     var r3 = Registers.GpRegisters[(uInstr >> 32) & 0xF];
     var b1 = Registers.GpRegisters[(uInstr >> 28) & 0xF];
     var d1 = (int)Bits.SignExtend(uInstr >> 16, 12);
     var b2 = Registers.GpRegisters[(uInstr >> 12) & 0xF];
     var d2 = (int)Bits.SignExtend(uInstr, 12);
     dasm.ops.Add(dasm.CreateAccess(b1, r1, d1));
     dasm.ops.Add(dasm.CreateAccess(b2, d2));
     dasm.ops.Add(new RegisterOperand(r3));
     return true;
 }
Example #20
0
 public static bool SSc(ulong uInstr, zSeriesDisassembler dasm)
 {
     var l = (byte)((uInstr >> 36) & 0xF);
     var i3 = (byte)((uInstr >> 32) & 0xF);
     var b1 = Registers.GpRegisters[(uInstr >> 28) & 0xF];
     var d1 = (int)Bits.SignExtend(uInstr >> 16, 12);
     var b2 = Registers.GpRegisters[(uInstr >> 12) & 0xF];
     var d2 = (int)Bits.SignExtend(uInstr, 12);
     dasm.ops.Add(dasm.CreateAccessLength(b1, d1, l + 1));
     dasm.ops.Add(dasm.CreateAccess(b2, d2));
     dasm.ops.Add(ImmediateOperand.Byte(i3));
     return true;
 }
Example #21
0
        private static bool SIL(ulong uInstr, zSeriesDisassembler dasm)
        {
            var b1 = Registers.GpRegisters[(uInstr >> 28) & 0xF];
            var d1 = (short)uInstr >> 16;
            var i2 = ImmediateOperand.Word16((ushort)uInstr);

            dasm.ops.Add(new MemoryOperand(dasm.arch.WordWidth)
            {
                Base   = b1,
                Offset = d1,
            });
            dasm.ops.Add(i2);
            return(true);
        }
Example #22
0
 public static bool RRE(ulong uInstr, zSeriesDisassembler dasm)
 {
     dasm.state.ops.Add(new RegisterOperand(Registers.GpRegisters[(uInstr >> 4) & 0xF]));
     dasm.state.ops.Add(new RegisterOperand(Registers.GpRegisters[(uInstr) & 0xF]));
     return(true);
 }
Example #23
0
 public override zSeriesInstruction Decode(ulong uInstr, zSeriesDisassembler dasm)
 {
     return(dasm.NotYetImplemented(msg));
 }
Example #24
0
 public override zSeriesInstruction Decode(ulong uInstr, zSeriesDisassembler dasm)
 {
     dasm.Nyi(uInstr, msg);
     return(dasm.Invalid());
 }
Example #25
0
 public abstract zSeriesInstruction Decode(ulong uInstr, zSeriesDisassembler dasm);
Example #26
0
 public override zSeriesInstruction Decode(ulong uInstr, zSeriesDisassembler dasm)
 {
     dasm.Nyi(uInstr, msg);
     return dasm.CreateInvalidInstruction();
 }
Example #27
0
 public static bool R(ulong uInstr, zSeriesDisassembler dasm)
 {
     dasm.ops.Add(new RegisterOperand(Registers.GpRegisters[uInstr & 0xF]));
     return(true);
 }
Example #28
0
 public static bool FF(ulong uInstr, zSeriesDisassembler dasm)
 {
     dasm.ops.Add(new RegisterOperand(Registers.FpRegisters[(uInstr >> 4) & 0xF]));
     dasm.ops.Add(new RegisterOperand(Registers.FpRegisters[(uInstr) & 0xF]));
     return true;
 }
Example #29
0
 public static bool RIa(ulong uInstr, zSeriesDisassembler dasm)
 {
     dasm.state.ops.Add(new RegisterOperand(Registers.GpRegisters[(uInstr >> 20) & 0xF]));
     dasm.state.ops.Add(ImmediateOperand.Int32((int)Bits.SignExtend(uInstr, 16)));
     return(true);
 }