internal byte Initialize()
{
DebugStub.Print("RTClock: initialize\n");
rps = timer.rps;
// Turn oscillator on, but disable and clear interrupts
if (Processor.SamplingEnabled())
{
WriteRtc(DS1287_A, DS1287_A_DIVON | DS1287_A_SAMPLING_HZ);
}
else
{
WriteRtc(DS1287_A, DS1287_A_DIVON | DS1287_A_64HZ);
}
WriteRtc(DS1287_B, DS1287_B_24H | DS1287_B_DF_BCD);
ReadRtc(DS1287_C); // Clear any update bits
if ((ReadRtc(DS1287_D) & DS1287_D_VRT) == 0)
{
DebugStub.Print("RTClock weak or defective power source.\n");
}
rtcBootTime = PullRtcTime().Ticks;
// Enable and clear interrupts
// NB it may take 500ms for first interrupt to be generated.
pic.EnableIrq(irq);
return(pic.IrqToInterrupt(irq));
}
public byte Initialize()
{
#if VERBOSE
Tracing.Log(Tracing.Debug, "Timer.Initialize()");
#endif
rps = new RtcPitState();
Stop();
DoPitPerformanceTests();
pic.EnableIrq(irq);
return(pic.IrqToInterrupt(irq));
}
internal static void AddEntry(int who, RtcPitState rps, TimerOmap3430 timer, long cookie)
{
if (ignoreCount != 0)
{
ignoreCount--;
return;
}
if (currentRecord == entries.Length)
{
return;
}
entries[currentRecord].who = who;
entries[currentRecord].cookie = cookie;
entries[currentRecord].when = Processor.CycleCount;
// int pitNow = timer.Timer2Read();
int pitNow = 0;
entries[currentRecord].currentTime =
(ulong)rps.GetKernelTicks(pitNow);
entries[currentRecord].upTime = rps.upTime;
entries[currentRecord].pitLastClock = rps.pitLastClock;
entries[currentRecord].pitNow = pitNow;
currentRecord = currentRecord + 1;
if (currentRecord == entries.Length)
{
bool iflag = Processor.DisableInterrupts();
try {
DumpEntries();
DebugStub.Assert(false);
}
finally {
Processor.RestoreInterrupts(iflag);
}
}
}
internal static void AddEntry(int who, RtcPitState rps, TimerOmap3430 timer)
{
AddEntry(who, rps, timer, 0);
}
internal static void AddEntry(int who, RtcPitState rps, Timer8254LegacyPC timer)
{
AddEntry(who, rps, timer, 0);
}
