public static void namcos1_driver_init(namcos1_specific specific)
{
key_id = specific.key_id;
key_reg = specific.key_reg1;
key_rng = specific.key_reg2;
key_swap4_arg = specific.key_reg3;
key_swap4 = specific.key_reg4;
key_bottom4 = specific.key_reg5;
key_top4 = specific.key_reg6;
s1ram = new byte[0x8000];
namcos1_triram = new byte[0x800];
namcos1_paletteram = new byte[0x8000];
}
public static void namcos1_driver_init(namcos1_specific specific)
{
/* keychip id */
key_id_query = specific.key_id_query;
key_id = specific.key_id;
/* tilemap use optimize option */
namcos1_set_optimize(specific.tilemap_use);
/* build bank elements */
namcos1_build_banks(specific.key_r, specific.key_w);
/* override opcode handling for extended memory bank handler */
Mame.cpu_setOPbaseoverride(0, namcos1_setopbase_0);
Mame.cpu_setOPbaseoverride(1, namcos1_setopbase_1);
/* sound cpu speedup optimize (auto detect) */
{
_BytePtr RAM = Mame.memory_region(Mame.REGION_CPU3); /* sound cpu */
for (int addr = 0xd000; addr < 0xd0ff; addr++)
{
if (RAM[addr + 0] == 0xb6 && /* lda xxxx */
RAM[addr + 3] == 0x27 && /* BEQ addr */
RAM[addr + 4] == 0xfb)
{
int flag_ptr = RAM[addr + 1] * 256 + RAM[addr + 2];
if (flag_ptr > 0x5140 && flag_ptr < 0x5400)
{
sound_spinlock_pc = addr + 3;
sound_spinlock_ram = Mame.install_mem_read_handler(2, flag_ptr, flag_ptr, namcos1_sound_spinlock_r);
//if (errorlog)fprintf(errorlog, "Set sound cpu spinlock : pc=%04x , addr = %04x\n", sound_spinlock_pc, flag_ptr);
break;
}
}
}
}
#if NEW_TIMER
/* all cpu's does not need synchronization to all timers */
cpu_set_full_synchronize(SYNC_NO_CPU);
{
const struct namcos1_slice_timer *slice = specific.slice_timer;
while(slice.sync_cpu != SYNC_NO_CPU)
{
/* start CPU slice timer */
cpu_start_extend_time_slice(slice.sync_cpu,
TIME_IN_HZ(slice.delayHz),TIME_IN_HZ(slice.sliceHz) );
slice++;
}
}
#else
/* compatible with old timer system */
Mame.Timer.timer_pulse(Mame.Timer.TIME_IN_HZ(60 * 25), 0, null);
#endif
}
