public SimInstruction(BaseOpcode opcode, byte size, SimOperand operand1, SimOperand operand2, SimOperand operand3, byte opcodeSize)
: this(opcode, size, 3, opcodeSize)
{
this.Operand1 = operand1;
this.Operand2 = operand2;
this.Operand3 = operand3;
}
public static SimOperand CreateLabel(int size, string label)
{
var op = new SimOperand(size);
op.Label = label;
return(op);
}
protected uint LoadValue(CPUx86 cpu, SimOperand operand)
{
if (operand.IsImmediate)
{
return((uint)operand.Immediate);
}
if (operand.IsRegister)
{
return(((operand.Register) as Register32Bit).Value);
}
if (operand.IsLabel)
{
return(ResolveLabel(cpu, operand));
}
if (operand.IsMemory)
{
uint address = GetAddress(cpu, operand);
return(Read(cpu, address, operand.Size));
}
throw new SimCPUException();
}
public SimInstruction(BaseOpcode opcode, byte size, SimOperand operand1, SimOperand operand2, SimOperand operand3, byte opcodeSize)
: this(opcode, size, 3, opcodeSize)
{
this.Operand1 = operand1;
this.Operand2 = operand2;
this.Operand3 = operand3;
}
public static SimOperand CreateImmediate(byte immediate)
{
var op = new SimOperand(8);
op.Immediate = immediate;
op.IsImmediate = true;
return(op);
}
public static SimOperand CreateImmediate(ushort immediate)
{
var op = new SimOperand(16);
op.Immediate = immediate;
op.IsImmediate = true;
return(op);
}
public static SimOperand CreateImmediate(ulong immediate, int size)
{
var op = new SimOperand(size);
op.Immediate = immediate;
op.IsImmediate = true;
return(op);
}
public static SimOperand CreateMemoryAddressLabel(int size, string label)
{
var op = new SimOperand(size);
op.Label = label;
op.IsMemory = true;
return(op);
}
public static SimOperand CreateMemoryAddress(int size, ulong immediate)
{
var op = new SimOperand(size);
op.IsMemory = true;
op.Immediate = immediate;
return(op);
}
public SimInstruction(BaseOpcode opcode, byte opcodeSize, SimOperand operand1, SimOperand operand2, SimOperand operand3, SimOperand operand4)
: this(opcode, opcodeSize, 4)
{
this.Operand1 = operand1;
this.Operand2 = operand2;
this.Operand3 = operand3;
this.Operand4 = operand4;
}
public SimInstruction(BaseOpcode opcode, byte size, SimOperand operand1, SimOperand operand2, SimOperand operand3, SimOperand operand4, byte opcodeSize)
: this(opcode, size, 4, opcodeSize)
{
Operand1 = operand1;
Operand2 = operand2;
Operand3 = operand3;
Operand4 = operand4;
}
public SimInstruction(BaseOpcode opcode, byte size, SimOperand operand1, SimOperand operand2, SimOperand operand3, SimOperand operand4, byte opcodeSize)
: this(opcode, size, 4, opcodeSize)
{
Operand1 = operand1;
Operand2 = operand2;
Operand3 = operand3;
Operand4 = operand4;
}
public override void Initialize()
{
var x86 = simCPU as CPUx86;
simCPU.AddMemory(0x00000000, 0x000A0000, 1); // First 640kb
simCPU.AddMemory(VectorReset, 0x0000000F, 2); // Vector Reset
simCPU.AddInstruction(VectorReset, new SimInstruction(Opcode.Call, 32, SimOperand.CreateLabel(32, VectorCall), 4));
}
protected void StoreFloatValue(CPUx86 cpu, SimOperand operand, double value, int size)
{
var val = new FloatingValue()
{
Low = value
};
StoreFloatValue(cpu, operand, val, size);
}
public static SimOperand CreateMemoryAddress(int size, SimRegister baseRegister, SimRegister index, int scale, int displacement)
{
var op = new SimOperand(size);
op.IsMemory = true;
op.Register = baseRegister;
op.Index = index;
op.Scale = scale;
op.Displacement = displacement;
return(op);
}
protected uint ResolveBranch(CPUx86 cpu, SimOperand operand)
{
if (operand.IsLabel)
{
return(ResolveLabel(cpu, operand));
}
else if (operand.IsImmediate)
{
return((uint)(cpu.EIP.Value + (long)operand.Immediate));
}
throw new InvalidProgramException();
}
protected uint ResolveLabel(CPUx86 cpu, SimOperand operand)
{
Debug.Assert(operand.IsLabel);
uint address = (uint)cpu.GetSymbol(operand.Label).Address;
if (operand.IsMemory)
{
return(Read(cpu, address, operand.Size));
}
else
{
return(address);
}
}
protected void StoreFloatValue(CPUx86 cpu, SimOperand operand, FloatingValue value, int size)
{
Debug.Assert(!operand.IsImmediate);
if (operand.IsRegister)
{
var newValue = ((operand.Register) as RegisterFloatingPoint).Value;
switch (size)
{
case 128:
newValue = value;
break;
case 64:
newValue.Low = value.Low;
break;
case 32:
newValue.LowF = value.LowF;
break;
}
((operand.Register) as RegisterFloatingPoint).Value = newValue;
}
if (operand.IsLabel)
{
uint address = (uint)cpu.GetSymbol(operand.Label).Address;
WriteFloat(cpu, address, value, size);
}
if (operand.IsMemory)
{
uint address = GetAddress(cpu, operand);
WriteFloat(cpu, address, value, size);
}
}
protected uint GetAddress(CPUx86 cpu, SimOperand operand)
{
Debug.Assert(operand.IsMemory);
int address = 0;
if (operand.Index != null)
{
// Memory = Register + (Base * Scale) + Displacement
address = (int)(((operand.Index) as GeneralPurposeRegister).Value * operand.Scale);
}
if (operand.Register != null)
{
address = address + (int)((operand.Register) as GeneralPurposeRegister).Value + operand.Displacement;
}
else
{
address = (int)operand.Immediate;
}
return((uint)address);
}
protected void StoreValue(CPUx86 cpu, SimOperand operand, uint value, int size)
{
Debug.Assert(!operand.IsImmediate);
if (operand.IsRegister)
{
((operand.Register) as Register32Bit).Value = value;
}
else if (operand.IsLabel)
{
uint address = (uint)cpu.GetSymbol(operand.Label).Address;
Write(cpu, address, value, size);
return;
}
else if (operand.IsMemory)
{
uint address = GetAddress(cpu, operand);
Write(cpu, address, value, size);
}
}
protected FloatingValue LoadFloatValue(CPUx86 cpu, SimOperand operand, int size)
{
if (operand.IsRegister)
{
return(((operand.Register) as RegisterFloatingPoint).Value);
}
if (operand.IsLabel)
{
uint address = (uint)cpu.GetSymbol(operand.Label).Address;
return(ReadFloat(cpu, address, size));
}
if (operand.IsMemory)
{
uint address = GetAddress(cpu, operand);
return(ReadFloat(cpu, address, size));
}
throw new SimCPUException();
}
protected uint GetAddress(CPUx86 cpu, SimOperand operand)
{
Debug.Assert(operand.IsMemory);
int address = 0;
if (operand.Index != null)
{
// Memory = Register + (Base * Scale) + Displacement
address = (int)(((operand.Index) as GeneralPurposeRegister).Value * operand.Scale);
}
if (operand.Register != null)
{
address = address + (int)((operand.Register) as GeneralPurposeRegister).Value + operand.Displacement;
}
else
{
address = (int)operand.Immediate;
}
return (uint)address;
}
protected void StoreFloatValue(CPUx86 cpu, SimOperand operand, double value, int size)
{
var val = new FloatingValue()
{
Low = value
};
StoreFloatValue(cpu, operand, val, size);
}
protected uint ResolveLabel(CPUx86 cpu, SimOperand operand)
{
Debug.Assert(operand.IsLabel);
uint address = (uint)cpu.GetSymbol(operand.Label).Address;
if (operand.IsMemory)
{
return Read(cpu, address, operand.Size);
}
else
{
return address;
}
}
protected uint ResolveBranch(CPUx86 cpu, SimOperand operand)
{
if (operand.IsLabel)
return ResolveLabel(cpu, operand);
else if (operand.IsImmediate)
return (uint)(cpu.EIP.Value + (long)operand.Immediate);
throw new InvalidProgramException();
}
protected uint LoadValue(CPUx86 cpu, SimOperand operand)
{
if (operand.IsImmediate)
{
return (uint)operand.Immediate;
}
if (operand.IsRegister)
{
return ((operand.Register) as Register32Bit).Value;
}
if (operand.IsLabel)
{
return ResolveLabel(cpu, operand);
}
if (operand.IsMemory)
{
uint address = GetAddress(cpu, operand);
return Read(cpu, address, operand.Size);
}
throw new SimCPUException();
}
public static SimOperand CreateLabel(int size, string label)
{
var op = new SimOperand(size);
op.Label = label;
return op;
}
public static SimOperand CreateMemoryAddress(int size, SimRegister baseRegister, SimRegister index, int scale, int displacement)
{
var op = new SimOperand(size);
op.IsMemory = true;
op.Register = baseRegister;
op.Index = index;
op.Scale = scale;
op.Displacement = displacement;
return op;
}
public static SimOperand CreateMemoryAddress(int size, ulong immediate)
{
var op = new SimOperand(size);
op.IsMemory = true;
op.Immediate = immediate;
return op;
}
public SimInstruction(BaseOpcode opcode, byte size, SimOperand operand1, byte opcodeSize)
: this(opcode, size, 1, opcodeSize)
{
this.Operand1 = operand1;
}
protected void StoreFloatValue(CPUx86 cpu, SimOperand operand, FloatingValue value, int size)
{
Debug.Assert(!operand.IsImmediate);
if (operand.IsRegister)
{
var newValue = ((operand.Register) as RegisterFloatingPoint).Value;
switch (size)
{
case 128:
newValue = value;
break;
case 64:
newValue.Low = value.Low;
break;
case 32:
newValue.LowF = value.LowF;
break;
}
((operand.Register) as RegisterFloatingPoint).Value = newValue;
}
if (operand.IsLabel)
{
uint address = (uint)cpu.GetSymbol(operand.Label).Address;
WriteFloat(cpu, address, value, size);
}
if (operand.IsMemory)
{
uint address = GetAddress(cpu, operand);
WriteFloat(cpu, address, value, size);
}
}
public static SimOperand CreateMemoryAddressLabel(int size, string label)
{
var op = new SimOperand(size);
op.Label = label;
op.IsMemory = true;
return op;
}
public static SimOperand CreateImmediate(byte immediate)
{
var op = new SimOperand(8);
op.Immediate = immediate;
op.IsImmediate = true;
return op;
}
public static SimOperand CreateImmediate(ulong immediate, int size)
{
var op = new SimOperand(size);
op.Immediate = immediate;
op.IsImmediate = true;
return op;
}
public SimInstruction(BaseOpcode opcode, byte opcodeSize, SimOperand operand1, SimOperand operand2)
: this(opcode, opcodeSize, 2)
{
this.Operand1 = operand1;
this.Operand2 = operand2;
}
protected void StoreFloatValue(CPUx86 cpu, SimOperand operand, double value, int size)
{
Debug.Assert(!operand.IsImmediate);
if (operand.IsRegister)
{
((operand.Register) as RegisterFloatingPoint).Value = value;
}
if (operand.IsLabel)
{
uint address = (uint)cpu.GetSymbol(operand.Label).Address;
WriteFloat(cpu, address, value, size);
}
if (operand.IsMemory)
{
uint address = GetAddress(cpu, operand);
WriteFloat(cpu, address, value, size);
}
}
protected void StoreValue(CPUx86 cpu, SimOperand operand, uint value, int size)
{
Debug.Assert(!operand.IsImmediate);
if (operand.IsRegister)
{
((operand.Register) as Register32Bit).Value = value;
}
else if (operand.IsLabel)
{
uint address = (uint)cpu.GetSymbol(operand.Label).Address;
Write(cpu, address, value, size);
return;
}
else if (operand.IsMemory)
{
uint address = GetAddress(cpu, operand);
Write(cpu, address, value, size);
}
}
public SimInstruction(BaseOpcode opcode, byte size, SimOperand operand1, SimOperand operand2, byte opcodeSize)
: this(opcode, size, 2, opcodeSize)
{
Operand1 = operand1;
Operand2 = operand2;
}
protected FloatingValue LoadFloatValue(CPUx86 cpu, SimOperand operand, int size)
{
if (operand.IsRegister)
{
return ((operand.Register) as RegisterFloatingPoint).Value;
}
if (operand.IsLabel)
{
uint address = (uint)cpu.GetSymbol(operand.Label).Address;
return ReadFloat(cpu, address, size);
}
if (operand.IsMemory)
{
uint address = GetAddress(cpu, operand);
return ReadFloat(cpu, address, size);
}
throw new SimCPUException();
}
public static SimOperand CreateImmediate(ushort immediate)
{
var op = new SimOperand(16);
op.Immediate = immediate;
op.IsImmediate = true;
return op;
}
public SimInstruction(BaseOpcode opcode, byte size, SimOperand operand1, byte opcodeSize)
: this(opcode, size, 1, opcodeSize)
{
this.Operand1 = operand1;
}
public SimInstruction(BaseOpcode opcode, byte size, SimOperand operand1, SimOperand operand2, byte opcodeSize)
: this(opcode, size, 2, opcodeSize)
{
Operand1 = operand1;
Operand2 = operand2;
}
