public void TestPUSH(RegisterPair pair) { var rom = AssembleSource($@" org 00h PUSH {pair.GetUpperRegister()} HLT "); var registers = new CPURegisters() { [pair] = 0x2477, }; var initialState = new CPUConfig() { Registers = registers, StackPointer = 0x3000, }; var state = Execute(rom, initialState); Assert.Equal(0x2477, state.Registers[pair]); Assert.Equal(0x00, state.Memory[0x3000]); Assert.Equal(0x24, state.Memory[0x2FFF]); Assert.Equal(0x77, state.Memory[0x2FFE]); Assert.Equal(0x2FFE, state.StackPointer); AssertFlagsFalse(state); Assert.Equal(2, state.Iterations); Assert.Equal(7 + 11, state.Cycles); Assert.Equal(0x01, state.ProgramCounter); }
public void TestPop(RegisterPair pair) { var rom = AssembleSource($@" org 00h POP {pair.GetUpperRegister()} HLT "); var memory = new byte[16384]; memory[0x2FFE] = 0x77; memory[0x2FFF] = 0x24; var initialState = new CPUConfig() { StackPointer = 0x2FFE, MemorySize = memory.Length, }; var state = Execute(rom, memory, initialState); Assert.Equal(0x2477, state.Registers[pair]); Assert.Equal(0x00, state.Memory[0x3000]); Assert.Equal(0x24, state.Memory[0x2FFF]); Assert.Equal(0x77, state.Memory[0x2FFE]); Assert.Equal(0x3000, state.StackPointer); AssertFlagsFalse(state); Assert.Equal(2, state.Iterations); Assert.Equal(7 + 10, state.Cycles); Assert.Equal(0x01, state.ProgramCounter); }
public void Test_LD_MNN_RR(RegisterPair registerPair) { var rom = AssembleSource($@" org 00h LD (2477h), {registerPair} HALT "); var memory = new byte[20490]; var initialState = new CPUConfig(); initialState.Registers[registerPair] = 0x6677; var state = Execute(rom, memory, initialState); Assert.Equal(0x77, state.Memory[0x2477]); Assert.Equal(0x66, state.Memory[0x2478]); AssertFlagsFalse(state); Assert.Equal(2, state.Iterations); Assert.Equal(4 + 20, state.Cycles); Assert.Equal(0x04, state.Registers.PC); }
public void Test_PUSH_RR(RegisterPair pair) { var rom = AssembleSource($@" org 00h PUSH {pair} HALT "); var initialState = new CPUConfig() { Registers = new CPURegisters() { SP = 0x3000, [pair] = 0x2477, }, }; var state = Execute(rom, initialState); Assert.Equal(0x2477, state.Registers[pair]); Assert.Equal(0x00, state.Memory[0x3000]); Assert.Equal(0x24, state.Memory[0x2FFF]); Assert.Equal(0x77, state.Memory[0x2FFE]); Assert.Equal(0x2FFE, state.Registers.SP); AssertFlagsFalse(state); Assert.Equal(2, state.Iterations); Assert.Equal(4 + 11, state.Cycles); Assert.Equal(0x01, state.Registers.PC); }
public Res(Processor processor, ushort opCode, RegisterPair register, bool isHigherByte, int bitNumber, string registerName) : base(processor, opCode, 0, 8, NAME) { this.register = register; this.isHigherByte = isHigherByte; this.bitNumber = bitNumber; this.registerName = registerName; }
public void Test_LD_MRR_A(RegisterPair registerPair) { var rom = AssembleSource($@" org 00h LD ({registerPair}), A HALT "); var registers = new CPURegisters(); registers.A = 0x42; registers[registerPair] = 0x2477; var initialState = new CPUConfig() { Registers = registers, }; var state = Execute(rom, initialState); Assert.Equal(0x42, state.Memory[0x2477]); Assert.Equal(0x42, state.Registers.A); AssertFlagsFalse(state); Assert.Equal(2, state.Iterations); Assert.Equal(4 + 7, state.Cycles); Assert.Equal(0x01, state.Registers.PC); }
public void TestDCX(RegisterPair pair) { var rom = AssembleSource($@" org 00h DCX {pair.GetUpperRegister()} DCX {pair.GetUpperRegister()} DCX {pair.GetUpperRegister()} HLT "); var registers = new CPURegisters() { [pair] = 0x3902, }; var initialState = new CPUConfig() { Registers = registers, }; var state = Execute(rom, initialState); Assert.Equal(0x38FF, state.Registers[pair]); AssertFlagsFalse(state); Assert.Equal(4, state.Iterations); Assert.Equal(7 + (5 * 3), state.Cycles); Assert.Equal(0x03, state.ProgramCounter); }
public void TestDAD_Carry(RegisterPair pair) { var rom = AssembleSource($@" org 00h DAD {pair.GetUpperRegister()} HLT "); var registers = new CPURegisters() { HL = 0xFFFE, [pair] = 0x0005, }; var initialState = new CPUConfig() { Registers = registers, }; var state = Execute(rom, initialState); Assert.Equal(0x0005, state.Registers[pair]); Assert.Equal(0x0003, state.Registers.HL); Assert.False(state.Flags.Zero); Assert.False(state.Flags.Sign); Assert.False(state.Flags.Parity); Assert.True(state.Flags.Carry); Assert.Equal(2, state.Iterations); Assert.Equal(7 + 10, state.Cycles); Assert.Equal(0x01, state.ProgramCounter); }
public BitInstructionData(ushort opCode, RegisterPair register, bool isHigherByte, int bitNumber, string registerName) { this.opCode = opCode; this.register = register; this.isHigherByte = isHigherByte; this.bitNumber = bitNumber; this.registerName = registerName; }
public void Test_ADD_IY_RR_Carry_HalfCarry(RegisterPair pair, UInt16 iyInitialValue, UInt16 pairInitialValue, UInt16 iyExpectedValue, UInt16 pairExpectedValue) { var rom = AssembleSource($@" org 00h ADD IY, {pair} HALT "); var registers = new CPURegisters() { IY = iyInitialValue, [pair] = pairInitialValue, }; var flags = new ConditionFlags() { // Should be unaffected. Sign = true, Zero = true, ParityOverflow = true, // Should be reset. Subtract = true, // Should be affected. HalfCarry = false, Carry = false, }; var initialState = new CPUConfig() { Registers = registers, Flags = flags, }; var state = Execute(rom, initialState); Assert.Equal(pairExpectedValue, state.Registers[pair]); Assert.Equal(iyExpectedValue, state.Registers.IY); // Should be unaffected. Assert.True(state.Flags.Sign); Assert.True(state.Flags.Zero); Assert.True(state.Flags.ParityOverflow); // Should be reset. Assert.False(state.Flags.Subtract); // Should be affected. Assert.True(state.Flags.HalfCarry); Assert.True(state.Flags.Carry); Assert.Equal(2, state.Iterations); Assert.Equal(4 + 15, state.Cycles); Assert.Equal(0x02, state.Registers.PC); }
private RegisterPair RegPC; // PC (program counter) private void ResetRegisters() { // Clear main registers RegAF = 0; RegBC = 0; RegDE = 0; RegHL = 0; RegWZ = 0; // Clear alternate registers RegAltAF = 0; RegAltBC = 0; RegAltDE = 0; RegAltHL = 0; // Clear special purpose registers RegI = 0; RegR = 0; RegIX.Word = 0; RegIY.Word = 0; RegSP.Word = 0; RegPC.Word = 0; }
public void Test_ADD_HL_RR_NoCarry(RegisterPair pair) { var rom = AssembleSource($@" org 00h ADD HL, {pair} HALT "); var registers = new CPURegisters() { HL = 0x1212, [pair] = 0x3434, }; var flags = new ConditionFlags() { Sign = true, Zero = true, HalfCarry = false, ParityOverflow = true, Subtract = true, Carry = false, }; var initialState = new CPUConfig() { Registers = registers, Flags = flags, }; var state = Execute(rom, initialState); Assert.Equal(0x3434, state.Registers[pair]); Assert.Equal(0x4646, state.Registers.HL); // Ensure these flags remain unchanged. Assert.True(state.Flags.Sign); Assert.True(state.Flags.Zero); Assert.True(state.Flags.ParityOverflow); Assert.False(state.Flags.HalfCarry); Assert.False(state.Flags.Subtract); Assert.False(state.Flags.Carry); // No carry in this case. Assert.False(state.Flags.Carry); Assert.Equal(2, state.Iterations); Assert.Equal(4 + 11, state.Cycles); Assert.Equal(0x01, state.Registers.PC); }
public void Test_ADC_HL_NoFlags(RegisterPair sourceRegister, UInt16 initialValue, UInt16 valueToAdd, UInt16 expectedValue, bool initialCarryFlag, ConditionFlags expectedFlags) { var rom = AssembleSource($@" org 00h ADC HL, {sourceRegister} HALT "); var registers = new CPURegisters(); registers.HL = initialValue; registers[sourceRegister] = valueToAdd; var flags = new ConditionFlags() { // Should be affected. Carry = initialCarryFlag, HalfCarry = !expectedFlags.HalfCarry, ParityOverflow = !expectedFlags.ParityOverflow, Zero = !expectedFlags.Zero, Sign = !expectedFlags.Sign, // Should be reset. Subtract = true, }; var initialState = new CPUConfig() { Registers = registers, Flags = flags, }; var state = Execute(rom, initialState); Assert.Equal(expectedValue, state.Registers.HL); Assert.Equal(valueToAdd, state.Registers[sourceRegister]); // Should be affected. Assert.Equal(expectedFlags.Carry, state.Flags.Carry); Assert.Equal(expectedFlags.HalfCarry, state.Flags.HalfCarry); Assert.Equal(expectedFlags.Sign, state.Flags.Sign); Assert.Equal(expectedFlags.ParityOverflow, state.Flags.ParityOverflow); Assert.Equal(expectedFlags.Zero, state.Flags.Zero); // Should be reset. Assert.False(state.Flags.Subtract); Assert.Equal(2, state.Iterations); Assert.Equal(4 + 15, state.Cycles); Assert.Equal(0x02, state.Registers.PC); }
static void Main(string[] args) { CarryBit.TestAll(); SingleRegister.TestAll(); DataTransfer.TestAll(); RegOrMemToAccum.TestAll(); RotateAccum.TestAll(); RegisterPair.TestAll(); Immediates.TestAll(); DirectAddressing.TestAll(); Jumps.TestAll(); Calls.TestAll(); Returns.TestAll(); Restarts.TestAll(); Console.Read(); }
public static Register GetUpperRegister(this RegisterPair pair) { switch (pair) { case RegisterPair.BC: return(Register.B); case RegisterPair.DE: return(Register.D); case RegisterPair.HL: return(Register.H); default: throw new System.NotImplementedException("Unhandled register pair: " + pair); } }
public void TestDAD_NoCarry(RegisterPair pair) { var rom = AssembleSource($@" org 00h DAD {pair.GetUpperRegister()} HLT "); var registers = new CPURegisters() { HL = 0x1212, [pair] = 0x3434, }; var flags = new ConditionFlags() { Zero = true, Sign = true, Parity = true, Carry = false, }; var initialState = new CPUConfig() { Registers = registers, Flags = flags, }; var state = Execute(rom, initialState); Assert.Equal(0x3434, state.Registers[pair]); Assert.Equal(0x4646, state.Registers.HL); // Ensure these flags remain unchanged. Assert.True(state.Flags.Zero); Assert.True(state.Flags.Sign); Assert.True(state.Flags.Parity); // No carry in this case. Assert.False(state.Flags.Carry); Assert.Equal(2, state.Iterations); Assert.Equal(7 + 10, state.Cycles); Assert.Equal(0x01, state.ProgramCounter); }
public void Test_LD_RR_NN(RegisterPair pair) { var rom = AssembleSource($@" org 00h LD {pair}, 4277h HALT "); var state = Execute(rom); Assert.Equal(0x4277, state.Registers[pair]); AssertFlagsFalse(state); Assert.Equal(2, state.Iterations); Assert.Equal(4 + 10, state.Cycles); Assert.Equal(0x03, state.Registers.PC); }
public void TestLXI(RegisterPair pair) { var rom = AssembleSource($@" org 00h LXI {pair.GetUpperRegister()}, 4277h HLT "); var state = Execute(rom); Assert.Equal(0x4277, state.Registers[pair]); AssertFlagsFalse(state); Assert.Equal(2, state.Iterations); Assert.Equal(10 + 7, state.Cycles); Assert.Equal(0x03, state.ProgramCounter); }
public void Test_SBC_HL_CarryFlag(RegisterPair sourceReg) { var rom = AssembleSource($@" org 00h SBC HL, {sourceReg} HALT "); var registers = new CPURegisters(); registers.HL = 0x02; registers[sourceReg] = 0x03; var flags = new ConditionFlags() { Carry = true, Subtract = false, }; var initialState = new CPUConfig() { Registers = registers, Flags = flags, }; var state = Execute(rom, initialState); Assert.Equal(0xFFFE, state.Registers.HL); Assert.Equal(0x03, state.Registers[sourceReg]); Assert.True(state.Flags.Sign); Assert.False(state.Flags.Zero); Assert.True(state.Flags.HalfCarry); Assert.False(state.Flags.ParityOverflow); Assert.True(state.Flags.Subtract); Assert.True(state.Flags.Carry); Assert.Equal(2, state.Iterations); Assert.Equal(4 + 15, state.Cycles); Assert.Equal(0x02, state.Registers.PC); }
public UInt16 this[RegisterPair pair] { get { switch (pair) { case RegisterPair.BC: return(this.BC); case RegisterPair.DE: return(this.DE); case RegisterPair.HL: return(this.HL); default: throw new System.NotImplementedException("Unhandled register pair: " + pair); } } set { switch (pair) { case RegisterPair.BC: this.BC = value; break; case RegisterPair.DE: this.DE = value; break; case RegisterPair.HL: this.HL = value; break; default: throw new System.NotImplementedException("Unhandled register pair: " + pair); } } }
public void Test_INC_RR(RegisterPair pair) { var rom = AssembleSource($@" org 00h INC {pair} INC {pair} INC {pair} HALT "); var registers = new CPURegisters() { [pair] = 0x38FF, }; var initialState = new CPUConfig() { Registers = registers, Flags = new ConditionFlags() { Sign = true, Zero = true, HalfCarry = true, ParityOverflow = true, Subtract = true, Carry = true, }, }; var state = Execute(rom, initialState); Assert.Equal(0x3902, state.Registers[pair]); // This opcode shouldn't affect flags. AssertFlagsSame(initialState, state); Assert.Equal(4, state.Iterations); Assert.Equal(4 + (6 * 3), state.Cycles); Assert.Equal(0x03, state.Registers.PC); }
public void Test_LD_RR_MNN(RegisterPair registerPair) { var rom = AssembleSource($@" org 00h LD {registerPair}, (2477h) HALT "); var memory = new byte[20490]; memory[0x2477] = 0x77; memory[0x2478] = 0x66; var initialState = new CPUConfig() { Flags = new ConditionFlags() { // Should remain unmodified. Sign = true, Zero = true, HalfCarry = true, ParityOverflow = true, Subtract = true, Carry = true, } }; var state = Execute(rom, memory, initialState); Assert.Equal(0x6677, state.Registers[registerPair]); AssertFlagsSame(initialState, state); Assert.Equal(2, state.Iterations); Assert.Equal(4 + 20, state.Cycles); Assert.Equal(0x04, state.Registers.PC); }
private RegisterPair RegPC; // PC (program counter) private void ResetRegisters() { // Clear main registers RegAF = 0; RegBC = 0; RegDE = 0; RegHL = 0; // Clear alternate registers RegAltAF = 0; RegAltBC = 0; RegAltDE = 0; RegAltHL = 0; // Clear special purpose registers RegI = 0; RegR = 0; RegIX.Word = 0; RegIY.Word = 0; RegSP.Word = 0; RegPC.Word = 0; }
private RegisterPair RegPC; // PC (program counter) private void ResetRegisters() { RegAF = 0; RegBC = 0; RegDE = 0; RegHL = 0; RegI = 0; RegSP.Word = 0; RegPC.Word = 0; }