/// <summary>
/// Transmit packet
/// </summary>
/// <param name="bytes">The bytes</param>
/// <param name="size">The size of the packet</param>
public static unsafe void Transmit(byte *bytes, uint size)
{
/**
* Max packetsize
*/
if (size >= 1500)
{
return;
}
m_tx_mutex.Lock();
uint current = m_curTX;
m_curTX++;
if (m_curTX == 4)
{
m_curTX = 0;
}
m_tx_mutex.Unlock();
// Acquire mutex on current descriptor
m_mutexes[current].Lock();
// Copy data to buffer
byte *bufferPtr = m_transmits[current];
Memory.Memcpy(bufferPtr, bytes, (int)size);
// Set status on this TX
uint status = size & 0x1FFF;
PortIO.Out32((ushort)(m_io_base + REG_TSD0 + (current * 4)), status);
}
/// <summary>
/// Receive initalization
/// </summary>
private static void rxInit()
{
/**
* Set receive buffer
*/
PortIO.Out32((ushort)(m_io_base + REG_BUF), (uint)Paging.GetPhysicalFromVirtual(m_buffer));
/**
* Set receive configuration register
*/
PortIO.Out32((ushort)(m_io_base + REG_RC), RC_AB | RC_AM | RC_APM | RC_WRAP);
}
/// <summary>
/// Change power state
/// </summary>
/// <param name="state">Power state</param>
public unsafe static void ChangePowerState(VboxDevPowerState state)
{
RequestPowerState *req = (RequestPowerState *)Heap.Alloc(sizeof(RequestPowerState));
req->header.Size = (uint)sizeof(RequestPowerState);
req->header.Version = 0x10001;
req->header.requestType = VboxDevRequestTypes.VMMDevReq_SetPowerStatus;
req->header.rc = 0xFFFFF;
req->PowerState = state;
PortIO.Out32((ushort)m_dev.BAR0.Address, (uint)Paging.GetPhysicalFromVirtual(req));
}
private static void writeCSR(byte csr_no, uint val)
{
writeRap(csr_no);
if (csr_no == 0)
{
PortIO.Out32((ushort)(m_io_base + REG_RDP), val | 0x10);
}
else
{
PortIO.Out32((ushort)(m_io_base + REG_RDP), val);
}
}
/// <summary>
/// Get host time
/// </summary>
/// <returns>Time since unix epoch</returns>
public unsafe static ulong GetHostTime()
{
RequestHostTime *req = (RequestHostTime *)Heap.Alloc(sizeof(RequestHostTime));
req->header.Size = (uint)sizeof(RequestHostTime);
req->header.Version = 0x10001;
req->header.requestType = VboxDevRequestTypes.VMMDevReq_GetHostTime;
req->header.rc = 0xFFFFF;
PortIO.Out32((ushort)m_dev.BAR0.Address, (uint)Paging.GetPhysicalFromVirtual(req));
return(req->Time);
}
/// <summary>
/// Driver initialization
/// </summary>
/// <param name="dev">PCI Device</param>
private static void initHandler(PciDevice dev)
{
m_dev = dev;
m_nambar = (ushort)dev.BAR0.Address;
m_nabmbar = (ushort)dev.BAR1.Address;
// Set IRQ handler and bus mastering and I/O space
Pci.SetInterruptHandler(dev, handler);
Pci.EnableBusMastering(dev);
Pci.EnableIOSpace(dev);
// Enable all interrupts
PortIO.Out8((ushort)(m_nabmbar + REG_CR), (CR_FEIE | CR_IOCE | CR_LVBIE));
// Volume
ushort volume = 0x03 | (0x03 << 8);
PortIO.Out16((ushort)(m_nambar + MASTER_VOLUME), volume);
PortIO.Out16((ushort)(m_nambar + PCM_OUT_VOLUME), volume);
// Buffers
m_bdls = new BDL_Entry[BDL_COUNT];
m_bufs = new ushort[BDL_COUNT][];
for (int i = 0; i < BDL_COUNT; i++)
{
m_bufs[i] = new ushort[AudioFS.BufferSize];
fixed(void *ptr = m_bufs[i])
{
m_bdls[i].pointer = Paging.GetPhysicalFromVirtual(ptr);
}
// Length and interrupt-on-clear
m_bdls[i].cl = AudioFS.BufferSize & 0xFFFF;
m_bdls[i].cl |= CL_IOC;
}
// Tell BDL location
fixed(void *ptr = m_bdls)
{
PortIO.Out32((ushort)(m_nabmbar + REG_BDBAR), (uint)Paging.GetPhysicalFromVirtual(ptr));
}
// Set last valid index
m_lvi = 3;
PortIO.Out8((ushort)(m_nabmbar + REG_LVI), (byte)m_lvi);
// Set audio to playing
PortIO.Out8((ushort)(m_nabmbar + REG_CR), (byte)(PortIO.In8((ushort)(m_nabmbar + REG_CR)) | CR_RPBM));
Console.WriteLine("[AC97] Initialized");
}
public static int AcpiOsWritePort(ulong Address, uint Value, uint Width)
{
if (Width == 8)
{
PortIO.Out8((ushort)Address, (byte)Value);
}
else if (Width == 16)
{
PortIO.Out16((ushort)Address, (ushort)Value);
}
else if (Width == 32)
{
PortIO.Out32((ushort)Address, Value);
}
else
{
return(AE_BAD_PARAMETER);
}
return(AE_OK);
}
private static void SoftwareReset()
{
// RESET
PortIO.In32((ushort)(m_io_base + 0x18));
PortIO.In16((ushort)(m_io_base + 0x14));
Sleep(5);
// SET BCR
PortIO.Out32((ushort)(m_io_base + REG_RDP), 0);
// Enable 32bit :)
writeBCR(20, 1);
// sws style 2 please
uint csr58 = readCSR(58);
csr58 &= 0xFFF0;
csr58 |= 2;
writeCSR(58, csr58);
}
/// <summary>
/// Transmit initalization
/// </summary>
private static void txInit()
{
/**
* Set transmit buffers
*/
for (int i = 0; i < 4; i++)
{
PortIO.Out32((ushort)(m_io_base + REG_TSAD0 + (i * 4)), (uint)Paging.GetPhysicalFromVirtual(m_transmits[i]));
}
/**
* Set transmit configuration register
*/
PortIO.Out32((ushort)(m_io_base + REG_TC), TC_DMA_2048);
// Mutexes so we can't reuse a TX buffer before it has been processed
m_tx_mutex = new Mutex();
m_mutexes = new Mutex[4];
for (int i = 0; i < 4; i++)
{
m_mutexes[i] = new Mutex();
}
}
/// <summary>
/// Gets info about the guest
/// </summary>
private unsafe static void getGuestInfo()
{
RequestGuestInfo *req = (RequestGuestInfo *)Heap.Alloc(sizeof(RequestGuestInfo));
req->header.Size = (uint)sizeof(RequestGuestInfo);
req->header.Version = 0x10001;
req->header.requestType = VboxDevRequestTypes.VMMDevReq_ReportGuestInfo;
req->header.rc = 0xFFFFF;
req->interfaceVersion = 0x10000;
req->osType = 0x10000;
PortIO.Out32((ushort)m_dev.BAR0.Address, (uint)Paging.GetPhysicalFromVirtual(req));
if (req->header.rc == 0)
{
Console.WriteLine("[VMMDev] Initialized");
m_initalized = true;
}
else
{
Console.WriteLine("[VMMDev] Initalization failed");
}
}
private static void initDevice(PciDevice dev)
{
if ((dev.BAR4.flags & Pci.BAR_IO) == 0)
{
Console.WriteLine("[UHCI] Only Portio supported");
}
Pci.EnableBusMastering(dev);
UHCIController uhciDev = new UHCIController();
uhciDev.IOBase = (ushort)dev.BAR4.Address;
uhciDev.Poll = Poll;
Console.Write("[UHCI] Initalize at 0x");
Console.WriteHex(uhciDev.IOBase);
Console.WriteLine("");
uhciDev.FrameList = (int *)Heap.AlignedAlloc(0x1000, sizeof(int) * 1024);
uhciDev.QueueHeadPool = (UHCIQueueHead *)Heap.AlignedAlloc(0x1000, sizeof(UHCIQueueHead) * MAX_HEADS);
uhciDev.TransmitPool = (UHCITransmitDescriptor *)Heap.AlignedAlloc(0x1000, sizeof(UHCITransmitDescriptor) * MAX_TRANSMIT);
Memory.Memclear(uhciDev.QueueHeadPool, sizeof(UHCIQueueHead) * MAX_HEADS);
Memory.Memclear(uhciDev.TransmitPool, sizeof(UHCITransmitDescriptor) * MAX_TRANSMIT);
UHCIQueueHead *head = GetQueueHead(uhciDev);
head->Head = TD_POINTER_TERMINATE;
head->Element = TD_POINTER_TERMINATE;
uhciDev.FirstHead = head;
for (int i = 0; i < 1024; i++)
{
uhciDev.FrameList[i] = TD_POINTER_QH | (int)Paging.GetPhysicalFromVirtual(head);
}
PortIO.Out16((ushort)(uhciDev.IOBase + REG_LEGSUP), 0x8f00);
/**
* Initalize framelist
*/
PortIO.Out16((ushort)(uhciDev.IOBase + REG_FRNUM), 0);
PortIO.Out32((ushort)(uhciDev.IOBase + REG_FRBASEADD), (uint)Paging.GetPhysicalFromVirtual(uhciDev.FrameList));
PortIO.Out8(((ushort)(uhciDev.IOBase + REG_SOFMOD)), 0x40); // Ensure default value of 64 (aka cycle time of 12000)
/**
* We are going to poll!
*/
PortIO.Out16((ushort)(uhciDev.IOBase + REG_USBINTR), 0x00);
/**
* Clear any pending statusses
*/
PortIO.Out16((ushort)(uhciDev.IOBase + REG_USBSTS), 0xFFFF);
/**
* Enable device
*/
PortIO.Out16((ushort)(uhciDev.IOBase + REG_USBCMD), USBCMD_RS);
probe(uhciDev);
Sharpen.USB.USB.RegisterController(uhciDev);
}
private static void writeBCR(ushort bcr, ushort val)
{
writeRap(bcr);
PortIO.Out32((ushort)(m_io_base + REG_BDP), val);
}
private static void writeRap(ushort val)
{
PortIO.Out32((ushort)(m_io_base + REG_RAP), val);
}
