Example #1
0
		public void RunOneFirst()
		{

			pulse[0].Run();
			pulse[1].Run();
			triangle.Run();
			noise.Run();
			dmc.Run();

			pulse[0].len_halt = false;
			pulse[1].len_halt = false;
			noise.len_halt = false;
		}
Example #2
0
        public void RunOne()
        {
            pulse[0].Run();
            pulse[1].Run();
            triangle.Run();
            noise.Run();
            dmc.Run();

            EmitSample();

            //this (and the similar line below) is a crude hack
            //we should be generating logic to suppress the $4015 clear when the assert signal is set instead
            //be sure to test "apu_test" if you mess with this
            sequencer_irq |= sequencer_irq_assert;

            if (toggle == 0)
            {
                //handle sequencer irq clear signal
                sequencer_irq_assert = false;
                if (sequencer_irq_clear_pending)
                {
                    //Console.WriteLine("{0} {1,5} $4017 clear irq (delayed)", nes.Frame, sequencer_counter);
                    sequencer_irq_clear_pending = false;
                    sequencer_irq = false;
                    SyncIRQ();
                }

                //handle writes from the odd clock cycle
                if (pending_reg != -1)
                {
                    _WriteReg(pending_reg, pending_val);
                }
                pending_reg = -1;
                toggle      = 1;

                //latch whatever irq logic we had and send to cpu
                nes.irq_apu = irq_pending;
            }
            else
            {
                toggle = 0;
            }

            sequencer_tick();
            sequencer_irq |= sequencer_irq_assert;
            SyncIRQ();

            //since the units run concurrently, the APU frame sequencer is ran last because
            //it can change the ouput values of the pulse/triangle channels
            //we want the changes to affect it on the *next* cycle.
        }