private AllOps GetOpA(ushort word0)
{
int operandA = ((word0 & opCodeAH) >> 10);
AllOps opA = (AllOps)operandA;
return(opA);
}
private AllOps GetOpB(ushort word0)
{
int operandB = ((word0 & opCodeBH) >> 5);
AllOps opB = (AllOps)operandB;
return(opB);
}
public IOperandVal GetOperandVal(AllOps allOps)
{
switch (allOps)
{
case AllOps.A:
return(new RegisterA(idcpu));
break;
case AllOps.A_MEM:
return(new RegisterAMem(idcpu));
break;
case AllOps.B:
return(new RegisterB(idcpu));
break;
case AllOps.B_MEM:
return(new RegisterBMem(idcpu));
break;
case AllOps.C:
return(new RegisterC(idcpu));
break;
case AllOps.C_MEM:
return(new RegisterCMem(idcpu));
break;
case AllOps.X:
return(new RegisterX(idcpu));
break;
case AllOps.X_MEM:
return(new RegisterXMem(idcpu));
break;
case AllOps.Y:
return(new RegisterY(idcpu));
break;
case AllOps.Y_MEM:
return(new RegisterYMem(idcpu));
break;
case AllOps.Z:
return(new RegisterZ(idcpu));
break;
case AllOps.Z_MEM:
return(new RegisterZMem(idcpu));
break;
case AllOps.I:
return(new RegisterI(idcpu));
break;
case AllOps.I_MEM:
return(new RegisterIMem(idcpu));
break;
case AllOps.J:
return(new RegisterJ(idcpu));
break;
case AllOps.J_MEM:
return(new RegisterJMem(idcpu));
break;
case AllOps.PC:
return(new RegisterPC(idcpu));
break;
case AllOps.LIT_0:
case AllOps.LIT_1:
case AllOps.LIT_3:
case AllOps.LIT_4:
case AllOps.LIT_5:
case AllOps.LIT_6:
case AllOps.LIT_7:
case AllOps.LIT_8:
case AllOps.LIT_9:
case AllOps.LIT_11:
case AllOps.LIT_12:
case AllOps.LIT_13:
case AllOps.LIT_14:
case AllOps.LIT_15:
case AllOps.LIT_16:
case AllOps.LIT_17:
case AllOps.LIT_18:
case AllOps.LIT_19:
case AllOps.LIT_20:
case AllOps.LIT_21:
case AllOps.LIT_22:
case AllOps.LIT_23:
case AllOps.LIT_24:
case AllOps.LIT_25:
case AllOps.LIT_26:
case AllOps.LIT_27:
case AllOps.LIT_28:
case AllOps.LIT_29:
case AllOps.LIT_30:
ushort litValue = (ushort)allOps;
litValue -= 33;
return(new LitOperandVaL(litValue));
break;
default:
return(new RegisterA(idcpu));
}
}
private void StartExecution()
{
while (true)
{
var currentWord = this[PC];
length = 0;
Ins opCode = GetOpCode(currentWord);
Action <IOperandVal, IOperandVal, IDCPU> operation = null;
if (opCode != Ins.SPL)
{
operation = operationResolver.GetOperations(opCode);
}
AllOps opA = GetOpA(currentWord);
IOperandVal operandA, operandB;
if (opA == AllOps.NXT_WRD || opA == AllOps.NXT_WRD_MEM)
{
length++;
var nextWord = this[PC + length];
if (opA == AllOps.NXT_WRD)
{
operandA = new LitOperandVaL(nextWord);
}
else
{
operandA = new MemAddressOperandVaL(nextWord, this);
}
}
else
{
operandA = operandResolver.GetOperandVal(opA);
}
AllOps opB = GetOpB(currentWord);
if (opB == AllOps.NXT_WRD || opB == AllOps.NXT_WRD_MEM)
{
length++;
var nextWord = this[PC + length];
if (opA == AllOps.NXT_WRD)
{
operandB = new LitOperandVaL(nextWord);
}
else
{
operandB = new MemAddressOperandVaL(nextWord, this);
}
}
else
{
operandB = operandResolver.GetOperandVal(opB);
}
if (!SkipNext)
{
operation(operandA, operandB, this);
}
else
{
SkipNext = false;
PC = (ushort)(PC + InstructionLength);
PC++;
}
}
}
