public void Write(ushort address, byte data)
{
switch (address & 0xE000)
{
case 0x8000:
reg = data;
break;
case 0xA000:
switch (reg & 0x0F)
{
case 0x00: Map.Switch1kChrRom(data, 0); break;
case 0x01: Map.Switch1kChrRom(data, 1); break;
case 0x02: Map.Switch1kChrRom(data, 2); break;
case 0x03: Map.Switch1kChrRom(data, 3); break;
case 0x04: Map.Switch1kChrRom(data, 4); break;
case 0x05: Map.Switch1kChrRom(data, 5); break;
case 0x06: Map.Switch1kChrRom(data, 6); break;
case 0x07: Map.Switch1kChrRom(data, 7); break;
case 0x08:
if ((data & 0x40) == 0)
{
Map.Switch8kPrgRomToSRAM((data & 0x3F) * 2);
}
break;
case 0x09:
Map.Switch8kPrgRom(data * 2, 0);
break;
case 0x0A:
Map.Switch8kPrgRom(data * 2, 1);
break;
case 0x0B:
Map.Switch8kPrgRom(data * 2, 2);
break;
case 0x0C:
data &= 0x03;
if (data == 0)
{
Map.Cartridge.Mirroring = Mirroring.Vertical;
}
if (data == 1)
{
Map.Cartridge.Mirroring = Mirroring.Horizontal;
}
if (data == 2)
{
Map.Cartridge.Mirroring = Mirroring.One_Screen;
Map.Cartridge.MirroringBase = 0x2000;
}
if (data == 3)
{
Map.Cartridge.Mirroring = Mirroring.One_Screen;
Map.Cartridge.MirroringBase = 0x2400;
}
Map.ApplayMirroring();
break;
case 0x0D:
if (data == 0)
{
timer_irq_enabled = false;
}
if (data == 0x81)
{
timer_irq_enabled = true;
}
break;
case 0x0E:
timer_irq_counter_69 = (short)((timer_irq_counter_69 & 0xFF00) | data);
break;
case 0x0F:
timer_irq_counter_69 = (short)((timer_irq_counter_69 & 0x00FF) | (data << 8));
break;
}
break;
case 0xC000:
case 0xE000:
break;
}
}
