Ejemplo n.º 1
0
        static void initialize()
        {
            //processors

            //crossbar
            xbar = new Xbar();

            //ddr3
            DDR3DRAM ddr3 = new DDR3DRAM(Config.mem.ddr3_type, Config.mem.clock_factor, Config.mem.tWR, Config.mem.tWTR);
            uint cmax = (uint)Config.mem.channel_max;
            uint rmax = (uint)Config.mem.rank_max;

            //randomized page table
            ulong page_size = 4 * 1024;
            PageRandomizer prand = new PageRandomizer(page_size);
            Req.prand = prand;

            Console.Write("Initializing prand\n");

            //sequential page table
            PageSequencer pseq = new PageSequencer(page_size, cmax, rmax, ddr3.BANK_MAX);
            Req.pseq = pseq;

            if (Config.is_shared_cache)
            {
                Console.Write("Initializing shared cache\n");
                shared_cache = new Cache();         
            }
            else
            {
                Console.Write("Initializing private cache\n");
                shared_cache = null;
            }
    
            procs = new Proc[Config.N];

            for (int p = 0; p < Config.N; p++) {
                if (shared_cache == null)              
                    procs[p] = new Proc(new Cache(), new L1Cache(), Config.traceFileNames[p]);
                else
                {
                    Console.Write("Shared\n");
                    procs[p] = new Proc(shared_cache, new L1Cache(), Config.traceFileNames[p]);
                }
            }

            Console.Write(" periodic dump " + Config.periodic_dump + "\n");
            if (Config.periodic_dump)
            {

               rep_name_periodic_ipc = Config.periodic_name + "_ipc_periodic.txt";
               Console.Write("Creating IPC periodic file\n");
               periodic_writer_ipc = File.CreateText(rep_name_periodic_ipc);

            }


            //memory mapping
            MemMap.init(Config.mem.map_type, Config.mem.channel_max, Config.mem.rank_max, Config.mem.col_per_subrow, ddr3);

            //memory controllers
            mctrls = new MemCtrl[cmax];
            for (int i = 0; i < mctrls.Length; i++) {
                mctrls[i] = new MemCtrl(rmax, ddr3);
            }

            //memory schedulers and metamemory controllers
            if (!Config.sched.is_omniscient) {
                MemSched[] scheds = new MemSched[cmax];
                for (int i = 0; i < cmax; i++) {
                    scheds[i] = Activator.CreateInstance(Config.sched.typeof_sched_algo) as MemSched;
                }

                MemSched[] wbscheds = new MemSched[cmax];
                if (!Config.sched.same_sched_algo) {
                    for (int i = 0; i < cmax; i++) {
                        wbscheds[i] = Activator.CreateInstance(Config.sched.typeof_wbsched_algo) as MemSched;
                    }
                }
                else {
                    for (int i = 0; i < cmax; i++) {
                        wbscheds[i] = scheds[i];
                    }
                }

                MetaMemCtrl[] meta_mctrls = new MetaMemCtrl[cmax];
                for (int i = 0; i < cmax; i++) {
                    meta_mctrls[i] = new MetaMemCtrl(mctrls[i], scheds[i], wbscheds[i]);
                    mctrls[i].meta_mctrl = meta_mctrls[i];
                    scheds[i].meta_mctrl = meta_mctrls[i];
                    scheds[i].initialize();
                    wbscheds[i].meta_mctrl = meta_mctrls[i];
                    wbscheds[i].initialize();
                }
            }
            else {
                MemSched sched = Activator.CreateInstance(Config.sched.typeof_sched_algo) as MemSched;
                MemSched wbsched;
                if (!Config.sched.same_sched_algo) {
                    wbsched = Activator.CreateInstance(Config.sched.typeof_wbsched_algo) as MemSched;
                }
                else {
                    wbsched = sched;
                }
                
                MetaMemCtrl meta_mctrl = new MetaMemCtrl(mctrls, sched, wbsched);
                for (int i = 0; i < cmax; i++) {
                    mctrls[i].meta_mctrl = meta_mctrl;
                }
                sched.meta_mctrl = meta_mctrl;
                sched.initialize();
                wbsched.meta_mctrl = meta_mctrl;
                wbsched.initialize();
            }

            //wbmode
            mwbmode = Activator.CreateInstance(Config.mctrl.typeof_wbmode_algo, new Object[] { mctrls }) as MemWBMode;
            for (int i = 0; i < cmax; i++) {
                mctrls[i].mwbmode = mwbmode;
            }

            //blp tracker
            blptracker = new BLPTracker(mctrls);

        }
Ejemplo n.º 2
0
        static void initialize()
        {
            //processors

            //crossbar
            xbar              = new Xbar();
            cache_controller  = new CacheController();
            stride_prefetcher = new StridePrefetcher();

            //ddr3
            DDR3DRAM ddr3 = new DDR3DRAM(Config.mem.ddr3_type, Config.mem.clock_factor, Config.mem.tWR, Config.mem.tWTR);
            uint     cmax = (uint)Config.mem.channel_max;
            uint     rmax = (uint)Config.mem.rank_max;

            //randomized page table
            ulong          page_size = 4 * 1024;
            PageRandomizer prand     = new PageRandomizer(page_size);

            Req.prand = prand;


            //sequential page table
            PageSequencer pseq = new PageSequencer(page_size, cmax, rmax, ddr3.BANK_MAX);

            Req.pseq = pseq;

            if (Config.is_shared_cache)
            {
                shared_cache = new Cache();
            }
            else
            {
                shared_cache = null;
            }

            procs          = new Proc[Config.N];
            queuing_cycles = new int[Config.N];

            if (Config.aux_cache)
            {
                for (int p = 0; p < Config.N; p++)
                {
                    if (shared_cache == null)
                    {
                        procs[p] = new Proc(new Cache(), new AuxCache(), new L1Cache(), Config.traceFileNames[p]);
                    }
                    else
                    {
                        procs[p] = new Proc(shared_cache, new AuxCache(), new L1Cache(), Config.traceFileNames[p]);
                    }
                }
            }
            else
            {
                for (int p = 0; p < Config.N; p++)
                {
                    if (shared_cache == null)
                    {
                        procs[p] = new Proc(new Cache(), new L1Cache(), Config.traceFileNames[p]);
                    }
                    else
                    {
                        Console.Write("Shared\n");
                        procs[p] = new Proc(shared_cache, new L1Cache(), Config.traceFileNames[p]);
                    }
                }
            }

            if (Config.periodic_dump)
            {
                rep_name_periodic_service = Config.periodic_name + "_service_periodic.txt";
                periodic_writer_service   = File.CreateText(rep_name_periodic_service);

                rep_name_periodic_ipc = Config.periodic_name + "_ipc_periodic.txt";
                periodic_writer_ipc   = File.CreateText(rep_name_periodic_ipc);
            }


            //memory mapping
            MemMap.init(Config.mem.map_type, Config.mem.channel_max, Config.mem.rank_max, Config.mem.col_per_subrow, ddr3);

            //memory controllers
            mctrls = new MemCtrl[cmax];
            for (int i = 0; i < mctrls.Length; i++)
            {
                mctrls[i] = new MemCtrl(rmax, ddr3);
            }

            //memory schedulers and metamemory controllers
            if (!Config.sched.is_omniscient)
            {
                MemSched[] scheds = new MemSched[cmax];
                for (int i = 0; i < cmax; i++)
                {
                    scheds[i] = Activator.CreateInstance(Config.sched.typeof_sched_algo) as MemSched;
                }

                MemSched[] wbscheds = new MemSched[cmax];
                if (!Config.sched.same_sched_algo)
                {
                    for (int i = 0; i < cmax; i++)
                    {
                        wbscheds[i] = Activator.CreateInstance(Config.sched.typeof_wbsched_algo) as MemSched;
                    }
                }
                else
                {
                    for (int i = 0; i < cmax; i++)
                    {
                        wbscheds[i] = scheds[i];
                    }
                }

                MetaMemCtrl[] meta_mctrls = new MetaMemCtrl[cmax];
                for (int i = 0; i < cmax; i++)
                {
                    meta_mctrls[i]       = new MetaMemCtrl(mctrls[i], scheds[i], wbscheds[i]);
                    mctrls[i].meta_mctrl = meta_mctrls[i];
                    scheds[i].meta_mctrl = meta_mctrls[i];
                    scheds[i].initialize();
                    wbscheds[i].meta_mctrl = meta_mctrls[i];
                    wbscheds[i].initialize();
                }
            }
            else
            {
                MemSched sched = Activator.CreateInstance(Config.sched.typeof_sched_algo) as MemSched;
                MemSched wbsched;
                if (!Config.sched.same_sched_algo)
                {
                    wbsched = Activator.CreateInstance(Config.sched.typeof_wbsched_algo) as MemSched;
                }
                else
                {
                    wbsched = sched;
                }

                MetaMemCtrl meta_mctrl = new MetaMemCtrl(mctrls, sched, wbsched);
                for (int i = 0; i < cmax; i++)
                {
                    mctrls[i].meta_mctrl = meta_mctrl;
                }
                sched.meta_mctrl = meta_mctrl;
                sched.initialize();
                wbsched.meta_mctrl = meta_mctrl;
                wbsched.initialize();
            }

            //wbmode
            mwbmode = Activator.CreateInstance(Config.mctrl.typeof_wbmode_algo, new Object[] { mctrls }) as MemWBMode;
            for (int i = 0; i < cmax; i++)
            {
                mctrls[i].mwbmode = mwbmode;
            }

            //blp tracker
            blptracker = new BLPTracker(mctrls);
        }
Ejemplo n.º 3
0
        static void run()
        {
            //DateTime start_time = DateTime.Now;

            bool[] is_done = new bool[Config.N];
            for (int i = 0; i < Config.N; i++)
            {
                is_done[i] = false;
            }

            bool   finished       = false;
            string OutputFileName = Config.output + ".csv";

            while (!finished)
            {
                finished = true;

                if (cycles % 1000000 == 0)
                {
                    if (cycles != 0)
                    {
                        string OutputInformation = cycles.ToString() + " " + ((double)Dram_Utilization_size * 64 / 1073741824).ToString() + " " + ((double)Dram_req_num / (Dram_req_num + NVM_req_num + 0.001)).ToString();
                        using (StreamWriter sw = File.AppendText(OutputFileName))
                        {
                            sw.WriteLine(OutputInformation);
                        }
                        Dram_req_num = 0;
                        NVM_req_num  = 0;
                    }
                }

                //processors
                int pid = rand.Next(Config.N);
                for (int i = 0; i < Config.N; i++)
                {
                    Proc curr_proc = procs[pid];
//yang:
                    if (Config.sim_type == Config.SIM_TYPE.GROUPED && pid >= Config.group_boundary && pid < Config.N && is_done[pid] == false)
                    {
                        curr_proc.tick();
                    }
                    else if (Config.sim_type != Config.SIM_TYPE.PARALLEL || is_done[pid] == false)
                    {
                        curr_proc.tick();
                    }
                    pid = (pid + 1) % Config.N;
                }


                //memory controllers
                for (int n = 0; n < Config.mem.mctrl_num; n++)
                {
                    for (int i = 0; i < Config.mem.channel_max; i++)
                    {
                        mctrls[n][i].tick();
                    }
                }


                //blp tracker
                blptracker.tick();

                //xbar
                xbar.tick();

                //cache
                foreach (Cache c in caches)
                {
                    c.tick();
                }


                if (Config.proc.cache_insertion_policy == "PFA")
                {
                    mesur.tick();
                }
                if (Config.proc.cache_insertion_policy == "AC")
                {
                    mesur.tick();
                }


                //Jin: Row Migration Policies
                if (Config.proc.cache_insertion_policy == "RBLA" || Config.proc.cache_insertion_policy == "PFA")
                {
                    rmp.tick();
                }

                if (Config.proc.cache_insertion_policy == "AC")
                {
                    rmp.tick();
                }

                //progress simulation time
                cycles++;

                //warmup phase
                for (int p = 0; p < Config.N; p++)
                {
                    if (!proc_warmup[p])
                    {
                        if (Stat.procs[p].ipc.Count >= Config.warmup_inst_max)
                        {
                            proc_warmup[p] = true;
                            Stat.procs[p].Reset();
                            foreach (MemCtrlStat mctrl in Stat.mctrls)
                            {
                                mctrl.Reset(pid);
                            }
                            foreach (BankStat bank in Stat.banks)
                            {
                                bank.Reset(pid);
                            }
                            proc_warmup_cycles[p] = cycles;
                            Measurement.warmup_core_stall_cycles[p] = Measurement.core_stall_cycles[p];
                            processor_finished[p]        = false;
                            DRAM_processor_read_hit[p]   = 0;
                            DRAM_processor_read_miss[p]  = 0;
                            DRAM_processor_write_hit[p]  = 0;
                            DRAM_processor_write_miss[p] = 0;
                            DRAM_migration_read_hit[p]   = 0;
                            DRAM_migration_read_miss[p]  = 0;
                            DRAM_migration_write_hit[p]  = 0;
                            DRAM_migration_write_miss[p] = 0;
                            NVM_processor_read_hit[p]    = 0;
                            NVM_processor_read_miss[p]   = 0;
                            NVM_processor_write_hit[p]   = 0;
                            NVM_processor_write_miss[p]  = 0;
                            NVM_migration_read_hit[p]    = 0;
                            NVM_migration_read_miss[p]   = 0;
                            NVM_migration_write_hit[p]   = 0;
                            NVM_migration_write_miss[p]  = 0;
                            processor_cycles[p]          = 0;
                        }
                    }
                }



                //case #1: instruction constrained simulation
                if (Config.sim_type == Config.SIM_TYPE.INST)
                {
                    for (int p = 0; p < Config.N; p++)
                    {
                        if (is_done[p])
                        {
                            continue;
                        }

                        if (proc_warmup[p] && (Stat.procs[p].ipc.Count >= Config.sim_inst_max))
                        {
                            //simulation is now finished for this processor
                            finish_proc(p);
                            is_done[p] = true;

                            //Power Measurement:
                            processor_finished[p] = true;
                            processor_cycles[p]   = cycles - proc_warmup_cycles[p];

                            information_output(p);
                        }
                        else
                        {
                            //simulation is still unfinished for this processor
                            finished = false;
                        }
                    }
                }

                //case #2: cycle constrained simulation  // default case
                else if (Config.sim_type == Config.SIM_TYPE.CYCLE)
                {
                    if (cycles >= Config.sim_cycle_max)
                    {
                        finish_proc();
                        finished = true;
                    }
                    else
                    {
                        finished = false;
                    }
                }

                //case #3: run to completion
                else if (Config.sim_type == Config.SIM_TYPE.COMPLETION || Config.sim_type == Config.SIM_TYPE.PARALLEL)
                {
                    for (int p = 0; p < Config.N; p++)
                    {
                        if (is_done[p])
                        {
                            continue;
                        }

                        if (procs[p].trace.finished)
                        {
                            //simulation is now finished for this processor
                            finish_proc(p);
                            is_done[p] = true;
                        }
                        else
                        {
                            //simulation is still unfinished for this processor
                            finished = false;
                        }
                    }
                }

                //case #4: run to completion for the parallel group
                else if (Config.sim_type == Config.SIM_TYPE.GROUPED)
                {
                    for (int p = Config.group_boundary; p < Config.N; p++)
                    {
                        if (is_done[p])
                        {
                            continue;
                        }

                        if (procs[p].trace.finished)
                        {
                            //simulation is now finished for this processor
                            finish_proc(p);
                            is_done[p] = true;
                        }
                        else
                        {
                            //simulation is still unfinished for this processor
                            finished = false;
                        }
                    }
                    if (finished == true)
                    {
                        for (int p = 0; p < Config.group_boundary; p++)
                        {
                            finish_proc(p);
                        }
                    }
                }
            }
        }
Ejemplo n.º 4
0
        static void run()
        {
            //DateTime start_time = DateTime.Now;

            bool[] is_done = new bool[Config.N];
            for (int i = 0; i < Config.N; i++)
            {
                is_done[i] = false;
            }

            bool finished = false;

            while (!finished)
            {
                finished = true;

                //cache controller

                //processors
                int pid = rand.Next(Config.N);
                for (int i = 0; i < Config.N; i++)
                {
                    Proc curr_proc = procs[pid];
                    curr_proc.tick();
                    pid = (pid + 1) % Config.N;
                }

                //memory controllers
                for (int i = 0; i < Config.mem.channel_max; i++)
                {
                    mctrls[i].tick();
                }

                //blp tracker
                blptracker.tick();

                //xbar
                xbar.tick();

                //progress simulation time
                cycles++;

                //case #1: instruction constrained simulation
                if (Config.sim_type == Config.SIM_TYPE.INST)
                {
                    for (int p = 0; p < Config.N; p++)
                    {
                        if (is_done[p])
                        {
                            continue;
                        }

                        if (Stat.procs[p].ipc.Count >= Config.sim_inst_max)
                        {
                            //simulation is now finished for this processor
                            finish_proc(p);
                            is_done[p] = true;
                        }
                        else
                        {
                            //simulation is still unfinished for this processor
                            finished = false;
                        }
                    }
                }

                //case #2: cycle constrained simulation  // default case
                else if (Config.sim_type == Config.SIM_TYPE.CYCLE)
                {
                    if (cycles >= Config.sim_cycle_max)
                    {
                        finish_proc();
                        finished = true;
                    }
                    else
                    {
                        finished = false;
                    }
                }

                //case #3: run to completion
                else if (Config.sim_type == Config.SIM_TYPE.COMPLETION)
                {
                    for (int p = 0; p < Config.N; p++)
                    {
                        if (is_done[p])
                        {
                            continue;
                        }

                        if (procs[p].trace.finished)
                        {
                            //simulation is now finished for this processor
                            finish_proc(p);
                            is_done[p] = true;
                        }
                        else
                        {
                            //simulation is still unfinished for this processor
                            finished = false;
                        }
                    }
                }
            }
        }
Ejemplo n.º 5
0
        static void initialize()
        {
            if (Config.task_based == true)
            {
                string task_fname = Config.traceFileNames[0];
                if (Config.sim_type == Config.SIM_TYPE.GROUPED)
                {
                    task_fname = Config.traceFileNames[Config.group_boundary];
                }
                foreach (string dir in Config.TraceDirs.Split(',', ' '))
                {
                    if (File.Exists(dir + "/" + task_fname))
                    {
                        task_fname = dir + "/" + task_fname;
                    }
                }
                Dbg.Assert(File.Exists(task_fname));
                StreamReader tasks = new StreamReader(File.OpenRead(task_fname));
                while (true)
                {
                    string line = tasks.ReadLine();
                    if (line == null)
                    {
                        break;
                    }
                    task_queue.Enqueue(line);
                }
                tasks.Close();
            }

            Dram_Utilization_size = 0;
            Dram_req_num          = 0;
            NVM_req_num           = 0;

            //randomized page table
            ulong          page_size = 4 * 1024;
            PageRandomizer prand     = new PageRandomizer(page_size);

            Req.prand = prand;

            //processors
            procs = new Proc[Config.N];
            for (int p = 0; p < Config.N; p++)
            {
                if ((Config.task_based == true && Config.sim_type != Config.SIM_TYPE.GROUPED) ||
                    (Config.task_based == true && Config.sim_type == Config.SIM_TYPE.GROUPED && p >= Config.group_boundary && p < Config.N))
                {
                    procs[p] = new Proc(task_queue.Dequeue());
                }
                else
                {
                    procs[p] = new Proc(Config.traceFileNames[p]);
                }
            }

            //crossbar
            xbar = new Xbar();

// warmup phase
            proc_warmup        = new bool[Config.N];
            proc_warmup_cycles = new ulong[Config.N];
            for (int p = 0; p < Config.N; p++)
            {
                proc_warmup[p]        = false;
                proc_warmup_cycles[p] = 0;
            }

// Power Measurement:
            processor_finished        = new bool[Config.N];
            DRAM_processor_read_hit   = new ulong[Config.N];
            DRAM_processor_read_miss  = new ulong[Config.N];
            DRAM_processor_write_hit  = new ulong[Config.N];
            DRAM_processor_write_miss = new ulong[Config.N];
            DRAM_migration_read_hit   = new ulong[Config.N];
            DRAM_migration_read_miss  = new ulong[Config.N];
            DRAM_migration_write_hit  = new ulong[Config.N];
            DRAM_migration_write_miss = new ulong[Config.N];
            NVM_processor_read_hit    = new ulong[Config.N];
            NVM_processor_read_miss   = new ulong[Config.N];
            NVM_processor_write_hit   = new ulong[Config.N];
            NVM_processor_write_miss  = new ulong[Config.N];
            NVM_migration_read_hit    = new ulong[Config.N];
            NVM_migration_read_miss   = new ulong[Config.N];
            NVM_migration_write_hit   = new ulong[Config.N];
            NVM_migration_write_miss  = new ulong[Config.N];
            processor_cycles          = new ulong[Config.N];

            for (int p = 0; p < Config.N; p++)
            {
                processor_finished[p]        = false;
                DRAM_processor_read_hit[p]   = 0;
                DRAM_processor_read_miss[p]  = 0;
                DRAM_processor_write_hit[p]  = 0;
                DRAM_processor_write_miss[p] = 0;
                DRAM_migration_read_hit[p]   = 0;
                DRAM_migration_read_miss[p]  = 0;
                DRAM_migration_write_hit[p]  = 0;
                DRAM_migration_write_miss[p] = 0;
                NVM_processor_read_hit[p]    = 0;
                NVM_processor_read_miss[p]   = 0;
                NVM_processor_write_hit[p]   = 0;
                NVM_processor_write_miss[p]  = 0;
                NVM_migration_read_hit[p]    = 0;
                NVM_migration_read_miss[p]   = 0;
                NVM_migration_write_hit[p]   = 0;
                NVM_migration_write_miss[p]  = 0;
                processor_cycles[p]          = 0;
            }
//

            //Jin: Row Migration Policies
            rmp   = new Row_Migration_Policies();
            mesur = new Measurement();

            //ddr3
            DDR3DRAM ddr3 = new DDR3DRAM(Config.mem.ddr3_type, Config.mem.clock_factor, Config.mem.tWR, Config.mem.tWTR);
            uint     cmax = (uint)Config.mem.channel_max;
            uint     rmax = (uint)Config.mem.rank_max;

            //sequential page table
            PageSequencer pseq = new PageSequencer(page_size, cmax, rmax, ddr3.BANK_MAX);

            Req.pseq = pseq;


            //memory mapping
            MemMap.init(Config.mem.map_type, Config.mem.channel_max, Config.mem.rank_max, Config.mem.col_per_subrow, ddr3);

            //memory controllers
            mctrls = new MemCtrl[Config.mem.mctrl_num][];
            for (int n = 0; n < Config.mem.mctrl_num; n++)
            {
                mctrls[n] = new MemCtrl[cmax];
                for (int i = 0; i < mctrls[n].Length; i++)
                {
                    mctrls[n][i] = new MemCtrl(rmax, ddr3);
                }
            }

            //memory schedulers and metamemory controllers
            if (!Config.sched.is_omniscient)
            {
                MemSched[][] scheds = new MemSched[Config.mem.mctrl_num][];
                for (int n = 0; n < Config.mem.mctrl_num; n++)
                {
                    scheds[n] = new MemSched[cmax];
                    for (int i = 0; i < cmax; i++)
                    {
                        scheds[n][i] = Activator.CreateInstance(Config.sched.typeof_sched_algo) as MemSched;
                    }
                }

                MemSched[][] wbscheds = new MemSched[Config.mem.mctrl_num][];
                for (int n = 0; n < Config.mem.mctrl_num; n++)
                {
                    wbscheds[n] = new MemSched[cmax];
                    if (!Config.sched.same_sched_algo)
                    {
                        for (int i = 0; i < cmax; i++)
                        {
                            wbscheds[n][i] = Activator.CreateInstance(Config.sched.typeof_wbsched_algo) as MemSched;
                        }
                    }
                    else
                    {
                        for (int i = 0; i < cmax; i++)
                        {
                            wbscheds[n][i] = scheds[n][i];
                        }
                    }
                }

                MetaMemCtrl[][] meta_mctrls = new MetaMemCtrl[Config.mem.mctrl_num][];
                for (int n = 0; n < Config.mem.mctrl_num; n++)
                {
                    meta_mctrls[n] = new MetaMemCtrl[cmax];
                    for (int i = 0; i < cmax; i++)
                    {
                        meta_mctrls[n][i]       = new MetaMemCtrl(mctrls[n][i], scheds[n][i], wbscheds[n][i]);
                        mctrls[n][i].meta_mctrl = meta_mctrls[n][i];
                        scheds[n][i].meta_mctrl = meta_mctrls[n][i];
                        scheds[n][i].initialize();
                        wbscheds[n][i].meta_mctrl = meta_mctrls[n][i];
                        wbscheds[n][i].initialize();
                    }
                }
            }
            else
            {
                MemSched[] sched   = new MemSched[Config.mem.mctrl_num];
                MemSched[] wbsched = new MemSched[Config.mem.mctrl_num];
                for (int n = 0; n < Config.mem.mctrl_num; n++)
                {
                    sched[n] = Activator.CreateInstance(Config.sched.typeof_sched_algo) as MemSched;
                    if (!Config.sched.same_sched_algo)
                    {
                        wbsched[n] = Activator.CreateInstance(Config.sched.typeof_wbsched_algo) as MemSched;
                    }
                    else
                    {
                        wbsched[n] = sched[n];
                    }
                }

                MetaMemCtrl[] meta_mctrl = new MetaMemCtrl[Config.mem.mctrl_num];
                for (int n = 0; n < Config.mem.mctrl_num; n++)
                {
                    meta_mctrl[n] = new MetaMemCtrl(mctrls[n], sched[n], wbsched[n]);
                    for (int i = 0; i < cmax; i++)
                    {
                        mctrls[n][i].meta_mctrl = meta_mctrl[n];
                    }
                    sched[n].meta_mctrl = meta_mctrl[n];
                    sched[n].initialize();
                    wbsched[n].meta_mctrl = meta_mctrl[n];
                    wbsched[n].initialize();
                }
            }

            //wbmode
            for (int n = 0; n < Config.mem.mctrl_num; n++)
            {
                mwbmode = Activator.CreateInstance(Config.mctrl.typeof_wbmode_algo, new Object[] { mctrls[n] }) as MemWBMode;
                for (int i = 0; i < cmax; i++)
                {
                    mctrls[n][i].mwbmode = mwbmode;
                }

                //blp tracker
                blptracker = new BLPTracker(mctrls[n]);
            }
        }