public static async Task Aggregator(
// blinker
FPGA.OutputSignal <bool> LED1,
// UART
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
IsAlive.Blink(LED1);
Sequential handler = () =>
{
byte[] buff = new byte[11];
for (byte b = 0; b < 10; b++)
{
buff[b] = b;
}
buff[10] = 255;
for (byte i = 0; i < buff.Length; i++)
{
byte data = 0; // TODO: initializer from memory not supported yet
data = buff[i];
UART.Write(115200, data, TXD);
}
};
FPGA.Config.OnTimer(TimeSpan.FromSeconds(1), handler);
}
public static async Task Aggregator(
// blinker
FPGA.OutputSignal <bool> LED1,
// UART
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
bool internalTXD = true;
FPGA.Config.Link(internalTXD, TXD);
IsAlive.Blink(LED1);
Sequential handler = () =>
{
for (byte b = 0; b < 10; b++)
{
UART.RegisteredWrite(115200, b, out internalTXD);
}
UART.RegisteredWrite(115200, 255, out internalTXD);
};
FPGA.Config.OnTimer(TimeSpan.FromSeconds(1), handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
const uint baud = 115200;
Sequential handler = () =>
{
FPU.FPUScopeNoSync();
while (true)
{
float op1 = 0, op2 = 0;
UART.ReadFloat(baud, RXD, out op1);
UART.ReadFloat(baud, RXD, out op2);
var result = Compare(op1, op2);
UART.Write(baud, result, TXD);
}
};
FPGA.Config.OnStartup(handler);
}
public static async Task Aggregator(
FPGA.OutputSignal <bool> TXD,
FPGA.OutputSignal <bool> WiFiRXD,
// banks
FPGA.OutputSignal <bool> Bank1,
FPGA.OutputSignal <bool> Bank2,
FPGA.InputSignal <bool> Echo,
FPGA.OutputSignal <bool> Trigger
)
{
FPGA.Signal <bool> internalTXD = true;
FPGA.Config.Link(internalTXD, TXD);
FPGA.Config.Link(internalTXD, WiFiRXD);
QuokkaBoard.OutputBank(Bank1);
QuokkaBoard.InputBank(Bank2);
State state = new State();
object stateLock = new object();
DistanceMeasuring(state, stateLock, Echo, Trigger);
StateReporter(state, stateLock, internalTXD);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
const uint baud = 115200;
Sequential handler = () =>
{
FPU.FPUScopeNoSync();
while (true)
{
float data = 0;
UART.ReadFloat(baud, RXD, out data);
float[] buff = new float[2];
for (sbyte idx = -10; idx <= 10; idx++)
{
buff[0] = data * idx;
buff[1] = idx * data;
for (var i = 0; i < buff.Length; i++)
{
var tmp = buff[i];
UART.WriteFloat(baud, tmp, TXD);
}
}
}
};
FPGA.Config.OnStartup(handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
const uint baud = 115200;
var stream = new FPGA.SyncStream <float>();
Sequential <float> streamHandler = (data) =>
{
UART.WriteFloat(baud, data, TXD);
};
FPGA.Config.OnStream(stream, streamHandler);
Sequential handler = () =>
{
float f1 = 0, f2 = 1.234f;
UART.ReadFloat(baud, RXD, out f1);
stream.Write(f1);
stream.Write(f2);
};
FPGA.Config.OnStartup(handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
byte data = 0;
FPGA.Signal <bool> completed = false;
Sequential dataHandler = () =>
{
UART.Write(115200, data, TXD);
completed = true;
};
FPGA.Config.OnRegisterWritten(data, dataHandler);
Sequential mainHandler = () =>
{
data = 48;
FPGA.Runtime.WaitForAllConditions(completed);
data = 49;
FPGA.Runtime.WaitForAllConditions(completed);
};
const bool trigger = true;
FPGA.Config.OnSignal(trigger, mainHandler);
}
public static void Bootstrap(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD,
Action <byte, FPGA.SyncStream <byte> > testAction
)
{
const int baud = 115200;
var stream = new FPGA.SyncStream <byte>();
Sequential <byte> streamHandler = (data) =>
{
UART.Write(baud, data, TXD);
};
FPGA.Config.OnStream <byte>(stream, streamHandler);
Sequential handler = () =>
{
byte data = 0;
UART.Read(baud, RXD, out data);
testAction(data, stream);
};
const bool trigger = true;
FPGA.Config.OnSignal(trigger, handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
uint clockCounter = 0;
Diag.ClockCounter(clockCounter);
Sequential handler = () =>
{
FPU.FPUScopeNoSync();
const int width = 10;
const int baud = 115200;
ComplexFloat[] source = new ComplexFloat[GeneratorTools.ArrayLength(width)];
ComplexFloat[] target = new ComplexFloat[GeneratorTools.ArrayLength(width)];
FPGA.Config.NoSync(source);
while (true)
{
RTX.ReadData(baud, RXD, source);
uint start = clockCounter;
FFT.Transform(width, source, target, Direction.Forward);
uint end = clockCounter;
RTX.WriteData(baud, TXD, target, end - start);
}
};
FPGA.Config.OnStartup(handler);
}
public static async Task Aggregator(
FPGA.OutputSignal <bool> LED1,
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
Sequential handler = () =>
{
FPU.FPUScope();
const int width = 10;
const int baud = 115200;
while (true)
{
byte data = 0;
UART.Read(baud, RXD, out data);
uint length = GeneratorTools.ArrayLength(width);
for (uint i = 0; i < length; i++)
{
uint reversed = FPGA.Runtime.Reverse(i, width);
UART.WriteUnsigned32(baud, reversed, TXD);
}
}
};
FPGA.Config.OnStartup(handler);
Drivers.IsAlive.Blink(LED1);
}
public static async Task Aggregator(
FPGA.OutputSignal <bool> LED1,
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
Sequential handler = () =>
{
FPU.FPUScope();
const int width = 10;
const int baud = 115200;
ComplexFloat[] data = new ComplexFloat[GeneratorTools.ArrayLength(width)];
while (true)
{
RTX.ReadData(baud, RXD, data);
DFT.Transform(width, data, Direction.Forward);
RTX.WriteData(baud, TXD, data, 0);
}
};
FPGA.Config.OnStartup(handler);
Drivers.IsAlive.Blink(LED1);
}
public static void IndicatorsControls(
// keypad
FPGA.OutputSignal <bool> K7,
FPGA.OutputSignal <bool> K6,
FPGA.OutputSignal <bool> K5,
FPGA.OutputSignal <bool> K4,
FPGA.InputSignal <bool> K3,
FPGA.InputSignal <bool> K2,
FPGA.InputSignal <bool> K1,
FPGA.InputSignal <bool> K0,
IndicatorsControlsState controlsState)
{
Sequential keypadHandler = () =>
{
Keypad4x4.ReadASCIICode(K7, K6, K5, K4, K3, K2, K1, K0, out controlsState.keyCode);
};
FPGA.Config.OnTimer(TimeSpan.FromMilliseconds(20), keypadHandler);
Sequential tickHandler = () =>
{
controlsState.counterMs++;
};
FPGA.Config.OnTimer(TimeSpan.FromMilliseconds(1), tickHandler);
}
public static void ReadData(uint baud, FPGA.InputSignal <bool> RXD, ComplexFloat[] data)
{
uint tmp32 = 0;
for (uint i = 0; i < data.Length; i++)
{
FPGA.Config.SetInclusiveRange(0, data.Length, i);
ComplexFloat tmp = new ComplexFloat();
for (byte idx = 0; idx < 2; idx++)
{
FPGA.Config.SetInclusiveRange(0, 2, idx);
UART.ReadUnsigned32(baud, RXD, ref tmp32);
switch (idx)
{
case 0:
FPGA.Runtime.Assign(FPGA.Expressions.Unchecked(tmp32, out tmp.Re));
break;
case 1:
FPGA.Runtime.Assign(FPGA.Expressions.Unchecked(tmp32, out tmp.Im));
break;
}
}
data[i] = tmp;
}
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD)
{
var stream = new FPGA.SyncStream <byte>();
Sequential <byte> streamHandler = (value) =>
{
UART.Write(115200, value, TXD);
};
FPGA.Config.OnStream(stream, streamHandler);
Sequential handler = () =>
{
byte data = 0;
UART.Read(115200, RXD, out data);
for (ushort i = 0; i < data; i++)
{
stream.Write((byte)i);
}
};
const bool trigger = true;
FPGA.Config.OnSignal(trigger, handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
float f1 = 0, f2 = 0;
FPGA.Signal <float> result = 0;
byte fpuOp = 0;
FPGA.Signal <bool> fpuTrigger = false, fpuCompleted = false;
FPGA.Config.Entity <IFPU>().Op(fpuTrigger, fpuCompleted, f1, f2, fpuOp, result);
Sequential handler = () =>
{
const int baud = 115200;
UART.ReadFloat(baud, RXD, out f1);
UART.ReadFloat(baud, RXD, out f2);
UART.Read(baud, RXD, out fpuOp);
fpuTrigger = true;
FPGA.Runtime.WaitForAllConditions(fpuCompleted);
UART.WriteFloat(baud, result, TXD);
};
const bool trigger = true;
FPGA.Config.OnSignal(trigger, handler);
}
public static async Task Aggregator(
// UART signals
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD,
// ADC signals
FPGA.OutputSignal <bool> ADC1NCS,
FPGA.OutputSignal <bool> ADC1SLCK,
FPGA.OutputSignal <bool> ADC1DIN,
FPGA.InputSignal <bool> ADC1DOUT
)
{
Sequential handler = () =>
{
ushort adcChannel1Value = 0, adcChannel2Value = 0;
ADC102S021.Read(
out adcChannel1Value,
out adcChannel2Value,
ADC1NCS,
ADC1SLCK,
ADC1DIN,
ADC1DOUT);
Controllers.SRDTO response = new Controllers.SRDTO();
response.C1 = adcChannel1Value;
response.C2 = adcChannel2Value;
Drivers.JSON.SerializeToUART <Controllers.SRDTO>(ref response, TXD);
};
FPGA.Config.OnTimer(TimeSpan.FromSeconds(1), handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
Sequential handler = () =>
{
while (true)
{
byte start = UART.Read(115200, RXD);
ulong result = 0;
SequentialMath.Fibonacci(start, out result);
for (byte i = 0; i < 8; i++)
{
byte data = (byte)result;
UART.Write(115200, data, TXD);
result = result >> 8;
}
}
};
const bool trigger = true;
FPGA.Config.OnSignal(trigger, handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
byte data = 0;
Sequential processingHandler = () =>
{
DTOs.RoundTrip response = new DTOs.RoundTrip();
response.b = data;
Drivers.JSON.SerializeToUART <DTOs.RoundTrip>(ref response, TXD);
};
FPGA.Config.OnRegisterWritten(data, processingHandler);
Sequential deserializeHandler = () =>
{
UART.Read(115200, RXD, out data);
};
const bool trigger = true;
FPGA.Config.OnSignal(trigger, deserializeHandler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
Sequential handler = () =>
{
while (true)
{
byte data = UART.Read(115200, RXD);
switch (data)
{
case 0:
data = Increment(data);
break;
case 1:
var result = Increment(data);
data = result;
break;
}
UART.Write(115200, data, TXD);
}
};
FPGA.Config.OnStartup(handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
const int baud = 115200;
Sequential handler = () =>
{
while (true)
{
byte op = 0;
UART.Read(baud, RXD, out op);
uint op1 = 0, op2 = 0;
UART.ReadUnsigned32(baud, RXD, ref op1);
UART.ReadUnsigned32(baud, RXD, ref op2);
var result = TestMethod(op, (int)op1, (int)op2);
UART.WriteUnsigned64(baud, (ulong)result, TXD);
}
};
FPGA.Config.OnStartup(handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
const uint baud = 115200;
Sequential handler = () =>
{
FPGA.Optimizations.AddOptimizer <TestOptimizer>();
float f1 = 0, f2 = 1.234f;
bool internalTXD = true;
// hardlink from register to output signal, it has to hold its value
FPGA.Config.Link(internalTXD, TXD);
while (true)
{
UART.ReadFloat(baud, RXD, out f1);
UART.RegisteredWriteFloat(baud, f1, out internalTXD);
//UART.RegisteredWriteFloat(baud, f2, out internalTXD);
}
};
FPGA.Config.OnStartup(handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
Sequential handler = () =>
{
FPU.FPUScope();
const int baud = 115200;
byte command = 0;
float op1, op2, res = 0;
while (true)
{
UART.ReadFloat(baud, RXD, out op1);
UART.ReadFloat(baud, RXD, out op2);
command = UART.Read(baud, RXD);
FloatControllersOps.TestHandler(op1, op2, command, out res);
UART.WriteFloat(baud, res, TXD);
}
};
FPGA.Config.OnStartup(handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
Sequential mainHandler = () =>
{
byte data = 0;
byte[] buff = new byte[1000];
for (int i = 0; i < 1000; i++)
{
UART.Read(115200, RXD, out data);
buff[i] = data;
}
byte sum = 0;
for (int i = 0; i < 1000; i++)
{
data = buff[i];
sum += data;
}
UART.Write(115200, sum, TXD);
};
const bool trigger = true;
FPGA.Config.OnSignal(trigger, mainHandler);
}
public static async Task Aggregator(
// blinker
FPGA.OutputSignal <bool> LED1,
// banks
FPGA.OutputSignal <bool> Bank1,
FPGA.OutputSignal <bool> Bank2,
FPGA.OutputSignal <bool> Bank3,
// WS2812
FPGA.OutputSignal <bool> DOUT,
// UART
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
// SERVO IO is generated inside handlers
)
{
QuokkaBoard.OutputBank(Bank1);
QuokkaBoard.InputBank(Bank2);
QuokkaBoard.OutputBank(Bank3);
IsAlive.Blink(LED1);
DeviceControl(DOUT, RXD, TXD);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
bool internalTXD = true;
FPGA.Config.Link(internalTXD, TXD);
Sequential mainHandler = () =>
{
byte data = 0;
byte[] buff = new byte[] { 1, 2, 3, 4, 5 };
UART.Read(115200, RXD, out data);
for (int i = 0; i < buff.Length; i++)
{
byte existing = 0;
existing = buff[i];
UART.RegisteredWrite(115200, existing, out internalTXD);
}
};
FPGA.Config.OnStartup(mainHandler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
DTOs.IsPrimeRequest request = new DTOs.IsPrimeRequest();
FPGA.Signal <bool> deserialized = new FPGA.Signal <bool>();
Drivers.JSON.DeserializeFromUART <DTOs.IsPrimeRequest>(ref request, RXD, deserialized);
Sequential handler = () =>
{
bool result = false;
uint source = request.value;
// TODO: member access is not supported in function call
SequentialMath.IsPrime((uint)source, out result);
DTOs.IsPrimeResponse response = new DTOs.IsPrimeResponse();
response.value = request.value;
response.result = (byte)((result == true) ? 1 : 0);
Drivers.JSON.SerializeToUART <DTOs.IsPrimeResponse>(ref response, TXD);
};
FPGA.Config.OnSignal(deserialized, handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD)
{
var stream = new FPGA.SyncStream <byte>();
bool internalTXD = true;
FPGA.Config.Link(internalTXD, TXD);
object txdLock = new object();
Sequential <byte> streamHandler = (value) =>
{
lock (txdLock)
{
UART.RegisteredWrite(115200, value, out internalTXD);
}
};
FPGA.Config.OnStream(stream, streamHandler, 2);
Sequential handler = () =>
{
byte data = 0;
UART.Read(115200, RXD, out data);
for (ushort i = 0; i < data; i++)
{
stream.Write((byte)i);
}
};
const bool trigger = true;
FPGA.Config.OnSignal(trigger, handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
bool internalTXD = true;
FPGA.Config.Link(internalTXD, TXD);
Sequential handler = () =>
{
byte prev = 100, next = 0;
while (true)
{
next = UART.Read(115200, RXD);
UART.RegisteredWrite(115200, prev, out internalTXD);
UART.RegisteredWrite(115200, next, out internalTXD);
prev = next;
}
};
FPGA.Config.OnStartup(handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
Sequential handler = () =>
{
byte data = 0;
UART.Read(115200, RXD, out data);
Func <byte> dFunc = () => (byte)(data * 2);
FPGA.Signal <bool> writeEnable = false;
FPGA.Register <byte> result = new FPGA.Register <byte>(0);
FPGA.Config.RegisterOverride(result, dFunc, writeEnable);
FPGA.Runtime.Assign(FPGA.Expressions.AssignSignal(true, writeEnable));
UART.Write(115200, result, TXD);
};
const bool trigger = true;
FPGA.Config.OnSignal(trigger, handler);
}
public static async Task Aggregator(
FPGA.InputSignal <bool> RXD,
FPGA.OutputSignal <bool> TXD
)
{
object testLock = new object();
byte data = 0;
Sequential dataHandler = () =>
{
UART.Write(115200, data, TXD);
};
FPGA.Config.OnRegisterWritten(data, dataHandler);
Sequential mainHandler1 = () =>
{
lock (testLock)
{
FPGA.Runtime.Delay(TimeSpan.FromMilliseconds(5));
data = 48;
FPGA.Runtime.Delay(TimeSpan.FromMilliseconds(20));
data = 49;
FPGA.Runtime.Delay(TimeSpan.FromMilliseconds(5));
}
};
Sequential mainHandler2 = () =>
{
lock (testLock)
{
FPGA.Runtime.Delay(TimeSpan.FromMilliseconds(5));
data = 50;
FPGA.Runtime.Delay(TimeSpan.FromMilliseconds(20));
data = 51;
FPGA.Runtime.Delay(TimeSpan.FromMilliseconds(5));
}
};
const bool trigger = true;
FPGA.Config.OnSignal(trigger, mainHandler1);
FPGA.Config.OnSignal(trigger, mainHandler2);
Sequential resetHandler1 = () =>
{
FPGA.Runtime.ResetSequence(mainHandler1);
};
Sequential resetHandler2 = () =>
{
FPGA.Runtime.ResetSequence(mainHandler2);
};
FPGA.Config.OnTimer(TimeSpan.FromMilliseconds(10), resetHandler1);
FPGA.Config.OnTimer(TimeSpan.FromMilliseconds(19), resetHandler2);
}
