public ArmMemoryOperand(PrimitiveType width, RegisterStorage regBase, MachineOperand offset) : base(width)
{
if (width == null)
throw new ArgumentNullException("width");
Base = regBase;
Offset = offset;
}
public override Constant GetRegister(RegisterStorage r)
{
if (((isValid >> r.Number) & 1) != 0)
return Constant.Word32(regData[r.Number]);
else
return Constant.Invalid;
}
public override Constant GetRegister(RegisterStorage r)
{
if (valid[r.Number])
return Constant.Byte(regs[r.Number]);
else
return Constant.Invalid;
}
public override Constant GetRegister(RegisterStorage reg)
{
if (reg != null && isValid[(int)reg.Domain])
return Constant.Create(reg.DataType, registerFile[(int)reg.Domain]);
else
return Constant.Invalid;
}
/// <summary>
/// Creates an instance of PowerPcArchitecture.
/// </summary>
/// <param name="wordWidth">Supplies the word width of the PowerPC architecture.</param>
public PowerPcArchitecture(PrimitiveType wordWidth)
{
this.wordWidth = wordWidth;
this.ptrType = PrimitiveType.Create(Domain.Pointer, wordWidth.Size);
this.lr = new RegisterStorage("lr", 0x68, wordWidth);
this.cr = new RegisterStorage("cr", 0x69, wordWidth);
this.ctr = new RegisterStorage("ctr", 0x6A, wordWidth);
this.xer = new RegisterStorage("xer", 0x6B, wordWidth);
this.fpscr = new RegisterStorage("fpscr", 0x6C, wordWidth);
regs = new ReadOnlyCollection<RegisterStorage>(
Enumerable.Range(0, 0x20)
.Select(n => new RegisterStorage("r" + n, n, wordWidth))
.Concat(Enumerable.Range(0, 0x20)
.Select(n => new RegisterStorage("f" + n, n + 0x20, PrimitiveType.Word64)))
.Concat(Enumerable.Range(0, 0x20)
.Select(n => new RegisterStorage("v" + n, n + 0x40, PrimitiveType.Word128)))
.Concat(Enumerable.Range(0, 8)
.Select(n => new RegisterStorage("cr" + n, n + 0x60, PrimitiveType.Byte)))
.Concat(new[] { lr, cr, ctr, xer })
.ToList());
fpregs = new ReadOnlyCollection<RegisterStorage>(
regs.Skip(0x20).Take(0x20).ToList());
vregs = new ReadOnlyCollection<RegisterStorage>(
regs.Skip(0x40).Take(0x20).ToList());
cregs = new ReadOnlyCollection<RegisterStorage>(
regs.Skip(0x60).Take(0x8).ToList());
}
public override Constant GetRegister(RegisterStorage reg)
{
if (valid[reg.Number])
return Constant.Create(reg.DataType, regs[reg.Number]);
else
return Constant.Invalid;
}
public void Create()
{
RegisterStorage reg = new RegisterStorage("eax", 0, PrimitiveType.Word32);
Assert.AreEqual("eax", reg.Name);
Assert.AreEqual(0, reg.Number);
Assert.AreEqual("word32", reg.DataType.ToString());
}
private MachineOperand Mem32(RegisterStorage baseReg, int off)
{
var mem = new MemoryOperand(PrimitiveType.Word32);
mem.Base = baseReg;
mem.Offset = Constant.Word32(off);
return mem;
}
public MemoryOperand(PrimitiveType width, RegisterStorage @base, RegisterStorage index, byte scale, Constant off) : base(width)
{
SegOverride = RegisterStorage.None;
Base = @base;
Offset = off;
Index = index;
Scale = scale;
}
private Identifier Reg8(string name)
{
var mr = new RegisterStorage(name, ssaIds.Count, 0, PrimitiveType.Byte);
Identifier id = new Identifier(mr.Name, mr.DataType, mr);
SsaIdentifier sid = new SsaIdentifier(id, id, null, null, false);
ssaIds.Add(id, sid);
return sid.Identifier;
}
public override Constant GetRegister(RegisterStorage r)
{
Z80Register reg = r as Z80Register;
if (reg != null && isValid[reg.FileSlot])
return Constant.Create(reg.DataType, registerFile[reg.FileSlot]);
else
return Constant.Invalid;
}
static FakeArchitecture()
{
registers = new RegisterStorage[RegisterCount];
for (int i = 0; i < registers.Length; ++i)
{
registers[i] = new RegisterStorage("r" + i, i, 0, PrimitiveType.Word32);
}
}
static A32Registers()
{
r0 = new RegisterStorage("r0", 0, PrimitiveType.Word32);
r1 = new RegisterStorage("r1", 1, PrimitiveType.Word32);
r2 = new RegisterStorage("r2", 2, PrimitiveType.Word32);
r3 = new RegisterStorage("r3", 3, PrimitiveType.Word32);
r4 = new RegisterStorage("r4", 4, PrimitiveType.Word32);
r5 = new RegisterStorage("r5", 5, PrimitiveType.Word32);
r6 = new RegisterStorage("r6", 6, PrimitiveType.Word32);
r7 = new RegisterStorage("r7", 7, PrimitiveType.Word32);
r8 = new RegisterStorage("r8", 8, PrimitiveType.Word32);
r9 = new RegisterStorage("r9", 9, PrimitiveType.Word32);
r10 = new RegisterStorage("r10", 10, PrimitiveType.Word32);
r11 = new RegisterStorage("fp", 11, PrimitiveType.Word32);
ip = new RegisterStorage("ip", 12, PrimitiveType.Word32);
sp = new RegisterStorage("sp", 13, PrimitiveType.Word32);
lr = new RegisterStorage("lr", 14, PrimitiveType.Word32);
pc = new RegisterStorage("pc", 15, PrimitiveType.Word32);
GpRegs = new RegisterStorage[] {
r0,
r1,
r2,
r3,
r4,
r5,
r6,
r7,
r8,
r9,
r10,
r11,
ip,
sp,
lr,
pc,
};
RegistersByName = new Dictionary<string, RegisterStorage>(StringComparer.InvariantCultureIgnoreCase)
{
{ "r0", r0 },
{ "r1", r1 },
{ "r2", r2 },
{ "r3", r3 },
{ "r4", r4 },
{ "r5", r5 },
{ "r6", r6 },
{ "r7", r7 },
{ "r8", r8 },
{ "r9", r9 },
{ "r10", r10 },
{ "r11", r11 },
{ "ip", ip },
{ "sp", sp },
{ "lr", lr },
{ "pc", pc },
};
}
public OperandParser(Lexer lexer, SymbolTable symtab, Address addrBase, PrimitiveType defaultWordWidth, PrimitiveType defaultAddressWidth)
{
this.lexer = lexer;
this.symtab = symtab;
this.addrBase = addrBase;
this.defaultWordWidth = defaultWordWidth;
this.defaultAddressWidth = defaultAddressWidth;
this.segOverride = RegisterStorage.None;
}
public void CreateOutArgumentRegister()
{
RegisterStorage mr = new RegisterStorage("r1", 1, 0, PrimitiveType.Word32);
Identifier oarg = new Identifier("r1Out", PrimitiveType.Word32, new OutArgumentStorage(
new Identifier(mr.Name, PrimitiveType.Word32, mr)));
StringWriter w = new StringWriter();
oarg.Write(true, w);
Assert.AreEqual("Register out word32 r1Out", w.ToString());
}
private FakeInstruction Instr(uint addr)
{
var reg = new RegisterStorage("r2", 2, 0, PrimitiveType.Word32);
return new FakeInstruction(Operation.Add, new RegisterOperand(reg), new RegisterOperand(reg))
{
Address = Address.Ptr32(addr),
Length = 2,
};
}
public Address AddressFromSegOffset(RegisterStorage seg, uint offset)
{
Constant c = GetRegister(seg);
if (c.IsValid)
{
return arch.ProcessorMode.CreateSegmentedAddress((ushort) c.ToUInt32(), offset & 0xFFFF);
}
else
return null;
}
private ProcedureSignature CreateSignature(RegisterStorage ret, params RegisterStorage[] args)
{
var retReg = proc.Frame.EnsureRegister(ret);
var argIds = new List<Identifier>();
foreach (var arg in args)
{
argIds.Add(proc.Frame.EnsureRegister(arg));
}
return new ProcedureSignature(retReg, argIds.ToArray());
}
public override Constant GetRegister(RegisterStorage reg)
{
if ((valid[reg.Number] & reg.BitMask) == reg.BitMask)
{
var val = (regs[reg.Number] & reg.BitMask) >> (int)reg.BitAddress;
return Constant.Create(reg.DataType, val);
}
else
return Constant.Invalid;
}
public Address AddressFromSegOffset(RegisterStorage seg, uint offset)
{
Constant c = GetRegister(seg);
if (c.IsValid)
{
return Address.SegPtr((ushort) c.ToUInt32(), offset & 0xFFFF);
}
else
return null;
}
public Address AddressFromSegReg(RegisterStorage seg, RegisterStorage reg)
{
Constant c = GetRegister(reg);
if (c.IsValid)
{
return AddressFromSegOffset(seg, c.ToUInt32());
}
else
return null;
}
public void UseCreateWithArg()
{
var reg_edx = new RegisterStorage("edx",1,PrimitiveType.Word32);
var id2 = new Identifier("bar", PrimitiveType.Word32, new TemporaryStorage("bar", -1, PrimitiveType.Word32));
var r = new Identifier(reg_edx.Name, reg_edx.DataType, reg_edx);
var arg = new Identifier("barOut", PrimitiveType.Pointer32, new OutArgumentStorage(r));
var use2 = new UseInstruction(id2, arg);
Assert.AreSame(id2, use2.Expression);
Assert.AreEqual("barOut", use2.OutArgument.Name);
}
public override Constant GetRegister(RegisterStorage r)
{
if (isValid[r.Number])
{
return Constant.Create(r.DataType, values[r.Number]);
}
else
{
return Constant.Invalid;
}
}
public void Setup()
{
sp = new RegisterStorage("sp", 42, 0, PrimitiveType.Pointer32);
arch = new FakeArchitecture();
arch.StackRegister = sp;
sce = new FakeProcessorState(arch);
idSp = new Identifier(sp.Name, sp.DataType, sp);
m = new ExpressionEmitter();
}
public override bool IsSubRegisterOf(RegisterStorage reg2)
{
if (this != reg2 &&
0 <= Number && Number <= Registers.bh.Number&&
0 <= reg2.Number && reg2.Number <= Registers.bh.Number)
{
return (agrfStrictSubRegisters[reg2.Number] & (1 << Number)) != 0;
}
else
return false;
}
public override void SetRegister(RegisterStorage reg, Constant c)
{
if (c == null || !c.IsValid)
{
valid[reg.Number] = false;
}
else
{
reg.SetRegisterFileValues(regs, c.ToUInt32(), valid); //$REVIEW: AsUint64 for PPC-64?
}
}
private SsaIdentifierCollection BuildSsaIdentifiers()
{
var mrFoo = new RegisterStorage("foo", 1, 0, PrimitiveType.Word32);
var mrBar = new RegisterStorage("bar", 2, 1, PrimitiveType.Word32);
foo = new Identifier(mrFoo.Name, mrFoo.DataType, mrFoo);
var coll = new SsaIdentifierCollection();
var src = Constant.Word32(1);
foo = coll.Add(foo, new Statement(0, new Assignment(foo, src), null), src, false).Identifier;
return coll;
}
public override Constant GetRegister(RegisterStorage r)
{
if (isValid[r.Number])
{
return values[r.Number];
}
else
{
return Constant.Invalid;
}
}
public Address AddressFromSegOffset(X86State state, RegisterStorage seg, uint offset)
{
if (mode == ProcessorMode.Protected32)
{
return Address.Ptr32(offset);
}
else
{
return state.AddressFromSegOffset(seg, offset);
}
}
public override Constant GetRegister(RegisterStorage r)
{
if (valid[r.Number])
{
return Constant.Word16(regs[r.Number]);
}
else
{
return Constant.Invalid;
}
}
public override Tlcs90Instruction Decode(byte b, Tlcs90Disassembler dasm)
{
Tlcs90Instruction instr;
Constant offset = null;
RegisterStorage baseReg = null;
RegisterStorage idxReg = null;
switch (format[0])
{
case 'E':
switch (format[1])
{
case 'S': baseReg = Registers.sp; break;
case 'X': baseReg = Registers.ix; break;
case 'Y': baseReg = Registers.iy; break;
case 'H': baseReg = Registers.hl; idxReg = Registers.a; break;
default: throw new NotImplementedException(string.Format("Tlcs-90: src {0}", format));
}
;
if (idxReg == null)
{
if (!dasm.rdr.TryReadByte(out b))
{
return(null);
}
offset = Constant.SByte((sbyte)b);
}
break;
case 'B': baseReg = Registers.bc; break;
case 'D': baseReg = Registers.de; break;
case 'H': baseReg = Registers.hl; break;
case 'S': baseReg = Registers.sp; break;
case 'X': baseReg = Registers.ix; break;
case 'Y': baseReg = Registers.iy; break;
case 'M':
ushort us;
if (!dasm.rdr.TryReadLeUInt16(out us))
{
return(null);
}
offset = Constant.UInt16(us);
break;
case 'm':
byte pageAddr;
if (!dasm.rdr.TryReadByte(out pageAddr))
{
return(null);
}
offset = Constant.UInt16((ushort)(0xFF00 | pageAddr));
break;
default: throw new NotImplementedException(string.Format("Tlcs-90: src {0}", format));
}
if (!dasm.rdr.TryReadByte(out b))
{
return(null);
}
instr = srcEncodings[b].Decode(b, dasm);
if (instr == null)
{
return(null);
}
var operand = new MemoryOperand(dasm.dataWidth)
{
Base = baseReg,
Index = idxReg,
Offset = offset
};
if (dasm.backPatchOp == 0)
{
instr.op1 = operand;
if (instr.op2 != null)
{
operand.Width = instr.op2.Width;
}
}
else if (dasm.backPatchOp == 1)
{
instr.op2 = operand;
operand.Width = instr.op1.Width;
}
else
{
return(null);
}
return(instr);
}
public MemoryOperand(PrimitiveType width, RegisterStorage baseReg, short offset) : base(width)
{
this.Base = baseReg;
this.Offset = offset;
}
public IEnumerable <RegisterStorage> GetAliases(RegisterStorage reg)
{
throw new NotImplementedException();
}
public void RemoveAliases(ISet <RegisterStorage> ids, RegisterStorage reg)
{
throw new NotImplementedException();
}
public virtual Address MakeAddressFromSegOffset(X86State state, RegisterStorage seg, uint offset)
{
return(state.AddressFromSegOffset(seg, offset));
}
public DoubleRegisterOperand(RegisterStorage reg1, RegisterStorage reg2) : base(PrimitiveType.Word64)
{
this.Register1 = reg1;
this.Register2 = reg2;
}
public Identifier VisitRegisterStorage(RegisterStorage reg)
{
return(frame.EnsureRegister(reg));
}
private Expression OpSrc(MachineOperand op, RegisterStorage dataMemory)
{
switch (op)
{
case RegisterOperand reg:
return(binder.EnsureRegister(reg.Register));
case FlagGroupOperand flg:
return(binder.EnsureFlagGroup(flg.FlagGroup));
case ImmediateOperand imm:
return(imm.Value);
case AddressOperand addr:
return(addr.Address);
case MemoryOperand mem:
Expression ea;
if (mem.DirectAddress != null)
{
if (mem.Index != null)
{
ea = m.IAdd(mem.DirectAddress, binder.EnsureRegister(mem.Index));
}
else if (mem.DirectAddress is Constant c)
{
var alias = AliasedSpecialFunctionRegister(c.ToUInt16());
if (alias != null)
{
return(alias);
}
ea = c;
}
else
{
ea = mem.DirectAddress;
}
}
else if (mem.Register != null)
{
if (mem.Index != null)
{
var idx = binder.EnsureRegister(mem.Index);
if (mem.Register == Registers.PC)
{
ea = m.IAdd(
instr.Address + instr.Length, idx);
}
else
{
ea = binder.EnsureIdentifier(mem.Register);
ea = m.IAdd(ea, idx);
}
}
else
{
ea = binder.EnsureIdentifier(mem.Register);
}
}
else
{
throw new NotImplementedException();
}
if (dataMemory != null)
{
return(m.SegMem(mem.Width, binder.EnsureRegister(dataMemory), ea));
}
else
{
return(m.Mem(mem.Width, ea));
}
case BitOperand bit:
Expression e = binder.EnsureRegister(bit.Register);
if (bit.Bit > 0)
{
e = m.Shr(e, (byte)bit.Bit);
}
e = m.And(e, 1);
if (bit.Negated)
{
e = m.Not(e);
}
return(e);
case SequenceOperand seq:
return(binder.EnsureSequence(seq.Sequence.DataType, seq.Sequence.Name, seq.Sequence.Elements));
default:
throw new NotImplementedException($"Not implemented {op.GetType().Name}.");
}
}
public override RegisterStorage GetSubregister(RegisterStorage reg, int offset, int width)
{
throw new NotSupportedException();
}
public override Address MakeAddressFromSegOffset(X86State state, RegisterStorage seg, uint offset)
{
return(Address.Ptr64(offset));
}
public BitOperand(RegisterStorage sfr, int bit, bool negated) : base(PrimitiveType.Bool)
{
this.Register = sfr;
this.Bit = bit;
this.Negated = negated;
}
private void EmitPop(RegisterStorage reg)
{
RewritePop(orw.AluRegister(reg), instrCur.dataWidth);
}
public override void SetRegister(RegisterStorage r, Constant v)
{
throw new NotImplementedException();
}
private void RewritePush(RegisterStorage reg)
{
RewritePush(instrCur.dataWidth, orw.AluRegister(reg));
}
public RegisterStorage GetWidestSubregister(RegisterStorage reg, HashSet <RegisterStorage> bits)
{
throw new NotImplementedException();
}
public bool BackwalkInstructions(
RegisterStorage regIdx,
Block block)
{
return(BackwalkInstructions(regIdx, block.Statements.Reverse <Statement>()));
}
public RegisterStorage GetPart(RegisterStorage reg, DataType width)
{
throw new NotImplementedException();
}
static Registers()
{
var factory = new StorageFactory();
var gpregs = factory.RangeOfReg32(14, "r{0}");
sp = factory.Reg32("sp");
pc = factory.Reg32("pc");
GpRegisters = gpregs.Concat(new[] { sp, pc }).ToArray();
var spfactory = new StorageFactory(StorageDomain.SystemRegister);
p0 = spfactory.Reg("p0", PrimitiveType.Byte);
vr = spfactory.Reg("vr", PrimitiveType.Byte);
p2 = spfactory.Reg("p2", PrimitiveType.Byte);
p3 = spfactory.Reg("p3", PrimitiveType.Byte);
p4 = spfactory.Reg("p4", PrimitiveType.Word16);
ccr = spfactory.Reg("ccr", PrimitiveType.Word16);
p6 = spfactory.Reg("p6", PrimitiveType.Word16);
mof = spfactory.Reg("mof", PrimitiveType.Word32);
p8 = spfactory.Reg("p8", PrimitiveType.Word32);
ibr = spfactory.Reg("ibr", PrimitiveType.Word32);
irp = spfactory.Reg("irp", PrimitiveType.Word32);
srp = spfactory.Reg("srp", PrimitiveType.Word32);
bar = spfactory.Reg("bar", PrimitiveType.Word32);
dccr = spfactory.Reg("dccr", PrimitiveType.Word32);
brp = spfactory.Reg("brp", PrimitiveType.Word32);
usp = spfactory.Reg("usp", PrimitiveType.Word32);
SystemRegisters = new RegisterStorage[16]
{
p0,
vr,
p2,
p3,
p4,
ccr,
p6,
mof,
p8,
ibr,
irp,
srp,
bar,
dccr,
brp,
usp,
};
F = new FlagGroupStorage(dccr, (uint)FlagM.FF, "F", PrimitiveType.Bool);
P = new FlagGroupStorage(dccr, (uint)FlagM.PF, "P", PrimitiveType.Bool);
U = new FlagGroupStorage(dccr, (uint)FlagM.UF, "U", PrimitiveType.Bool);
M = new FlagGroupStorage(dccr, (uint)FlagM.MF, "M", PrimitiveType.Bool);
B = new FlagGroupStorage(dccr, (uint)FlagM.BF, "B", PrimitiveType.Bool);
I = new FlagGroupStorage(dccr, (uint)FlagM.IF, "I", PrimitiveType.Bool);
X = new FlagGroupStorage(dccr, (uint)FlagM.XF, "X", PrimitiveType.Bool);
N = new FlagGroupStorage(dccr, (uint)FlagM.NF, "N", PrimitiveType.Bool);
Z = new FlagGroupStorage(dccr, (uint)FlagM.ZF, "Z", PrimitiveType.Bool);
V = new FlagGroupStorage(dccr, (uint)FlagM.VF, "V", PrimitiveType.Bool);
C = new FlagGroupStorage(dccr, (uint)FlagM.CF, "C", PrimitiveType.Bool);
NZ = new FlagGroupStorage(dccr, (uint)(FlagM.NF | FlagM.ZF), "NZ", dccr.DataType);
NZVC = new FlagGroupStorage(dccr, (uint)(FlagM.NF | FlagM.ZF | FlagM.VF | FlagM.CF), "NZVC", dccr.DataType);
}
public RegisterStorage GetSubregister(RegisterStorage reg, int offset, int width)
{
throw new NotImplementedException();
}
private void Copy(RegisterStorage src, RegisterStorage dst)
{
m.Assign(
binder.EnsureRegister(dst),
binder.EnsureRegister(src));
}
public AArch32ProcessorState(AArch32ProcessorState that) : base(that)
{
this.arch = that.arch;
this.regData = new Dictionary <int, ulong>(that.regData);
this.pc = that.pc;
}
public override void SetRegister(RegisterStorage r, Constant v)
{
}
public AArch32ProcessorState(IProcessorArchitecture arch)
{
this.arch = arch;
this.regData = new Dictionary <int, ulong>();
this.pc = Registers.pc;
}
public RegOpRec(RegisterStorage regByte, RegisterStorage regWord)
{
this.regByte = regByte;
this.regWord = regWord;
}
public override Tlcs90Instruction Decode(byte b, Tlcs90Disassembler dasm)
{
RegisterStorage baseReg = null;
RegisterStorage idxReg = null;
ushort? absAddr = null;
Constant offset = null;
switch (format[0])
{
case 'M':
ushort a;
if (!dasm.rdr.TryReadLeUInt16(out a))
{
return(null);
}
absAddr = a;
break;
case 'm':
byte bb;
if (!dasm.rdr.TryReadByte(out bb))
{
return(null);
}
absAddr = (ushort)(0xFF00 | bb);
break;
case 'B': baseReg = Registers.bc; break;
case 'D': baseReg = Registers.de; break;
case 'H': baseReg = Registers.hl; break;
case 'X': baseReg = Registers.ix; break;
case 'Y': baseReg = Registers.iy; break;
case 'S': baseReg = Registers.sp; break;
case 'E':
switch (format[1])
{
case 'S': baseReg = Registers.sp; break;
case 'X': baseReg = Registers.ix; break;
case 'Y': baseReg = Registers.ix; break;
case 'H': baseReg = Registers.hl; idxReg = Registers.a; break;
default: throw new NotImplementedException(string.Format("Tlcs-90: dst {0}", format));
}
if (idxReg == null)
{
if (!dasm.rdr.TryReadByte(out b))
{
return(null);
}
offset = Constant.SByte((sbyte)b);
}
break;
default: throw new NotImplementedException(string.Format("Tlcs-90: dst {0}", format));
}
if (!dasm.rdr.TryReadByte(out b))
{
return(null);
}
var instr = dstEncodings[b].Decode(b, dasm);
if (instr == null)
{
return(null);
}
var operand = new MemoryOperand(dasm.dataWidth)
{
Base = baseReg,
Offset = absAddr.HasValue
? Constant.UInt16(absAddr.Value)
: offset,
};
if (dasm.backPatchOp == 0)
{
instr.op1 = operand;
if (instr.op2 != null)
{
instr.op1.Width = instr.op2.Width;
}
}
else if (dasm.backPatchOp == 1)
{
instr.op2 = operand;
instr.op2.Width = instr.op1.Width;
}
else
{
return(null);
}
return(instr);
}
public override FlagGroupStorage GetFlagGroup(RegisterStorage flagRegister, uint grf)
{
throw new NotImplementedException();
}
public override Constant GetRegister(RegisterStorage r)
{
return(Constant.Invalid);
}
public override bool TryGetRegister(string name, out RegisterStorage reg)
{
return(Registers.ByName.TryGetValue(name, out reg));
}
public override bool TryGetRegister(string name, out RegisterStorage reg)
{
throw new NotImplementedException();
}
public override string GrfToString(RegisterStorage flagRegister, string prefix, uint grf)
{
throw new NotImplementedException();
}
