public void LogicRAMIndexingModuleTest()
{
var sim = new RTLSimulator <LogicRAMIndexingModule, LogicRAMIndexingModuleInputs>(true);
sim.TraceToVCD(VCDOutputPath());
var tl = sim.TopLevel;
sim.ClockCycle(new LogicRAMIndexingModuleInputs()
{
WE = true, WriteAddr = 0, WriteData = 0x66
});
sim.ClockCycle(new LogicRAMIndexingModuleInputs()
{
WE = true, WriteAddr = 1, WriteData = 0xAA
});
sim.ClockCycle(new LogicRAMIndexingModuleInputs()
{
WE = true, WriteAddr = 2, WriteData = 0x55
});
sim.ClockCycle(new LogicRAMIndexingModuleInputs()
{
WE = true, WriteAddr = 3, WriteData = 0xFF
});
sim.ClockCycle(new LogicRAMIndexingModuleInputs()
{
ReadAddr = 2, OpData = 0xF0
});
Assert.AreEqual(false, tl.CmpMemLhs);
Assert.AreEqual(true, tl.CmpMemRhs);
Assert.AreEqual(0xF5, tl.LogicMemLhs);
Assert.AreEqual(0x50, tl.LogicMemRhs);
Assert.AreEqual(0x65, tl.MathMemLhs);
Assert.AreEqual(0x45, tl.MathMemRhs);
Assert.AreEqual(0xFF, tl.MemLhsRhs);
sim.ClockCycle(new LogicRAMIndexingModuleInputs()
{
ReadAddr = 0, OpData = 0x50
});
Assert.AreEqual(true, tl.CmpMemLhs);
Assert.AreEqual(false, tl.CmpMemRhs);
Assert.AreEqual(0x76, tl.LogicMemLhs);
Assert.AreEqual(0x40, tl.LogicMemRhs);
Assert.AreEqual(0x16, tl.MathMemLhs);
Assert.AreEqual(0xB6, tl.MathMemRhs);
Assert.AreEqual(0x10, tl.MemLhsRhs);
var tb = sim.TBAdapter(RTLVerilogConfig);
tb.PostSynthTimingSimulation();
}
public void VGAModule_FrameTest()
{
var sim = new RTLSimulator <VGAModule, VGAModuleInputs>(true);
/*
* // VCD output takes about 15 minutes to write
* sim.TraceToVCD(
* VCDOutputPath(),
* new RTLModuleSnapshotConfig()
* {
* Include = RTLModuleSnapshotConfigInclude.Inputs | RTLModuleSnapshotConfigInclude.Outputs,
* MaxNestingLevel = 0
* });
*/
var tl = sim.TopLevel;
int pixelCounter = 0;
for (int row = 0; row < 628; row++)
{
for (int col = 0; col < 1 /*056*/; col++)
{
if (tl.IsVisible)
{
pixelCounter++;
}
sim.ClockCycle(new VGAModuleInputs());
}
}
//Assert.AreEqual(800 * 600, pixelCounter);
var tb = sim.TBAdapter(RTLVerilogConfig);
//tb.TranslateModule();
//tb.SaveTestbench();
tb.PostSynthTimingSimulation();
//Assert.AreEqual(480, hSyncCounter, "HSync is wrong");
//Assert.AreEqual(640, hSyncCounter, "VSync is wrong");
}