public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
var prefix = instruction.SegmentPrefix;
if (prefix == Register.Invalid)
{
prefix = Register.DS;
}
var sourceAddress = InstructionHelper.SegmentToAddress(cpu.GetRegister(prefix), cpu.GetRegister(Register.SI));
byte size;
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
cpu.SetRegisterU8(Register.AL, cpu.ReadU8(sourceAddress));
size = 1;
}
else
{
cpu.SetRegister(Register.AX, cpu.ReadU16(sourceAddress));
size = 2;
}
if (!cpu.GetFlags().Has(FlagsRegister.Direction))
{
cpu.SetRegister(Register.SI, (ushort)(cpu.GetRegister(Register.SI) + size));
}
else
{
cpu.SetRegister(Register.SI, (ushort)(cpu.GetRegister(Register.SI) - size));
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
ushort value1;
ushort value2;
byte size;
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
value1 = cpu.GetRegisterU8(Register.AL);
value2 = cpu.ReadU8(InstructionHelper.SegmentToAddress(cpu.GetRegister(Register.ES), cpu.GetRegister(Register.DI)));
size = 1;
}
else
{
value1 = cpu.GetRegister(Register.AX);
value2 = cpu.ReadU16(InstructionHelper.SegmentToAddress(cpu.GetRegister(Register.ES), cpu.GetRegister(Register.DI)));
size = 2;
}
var result = value1 - value2;
InstructionHelper.CalculateSubFlags(cpu, instruction.Flag, value1, value2, result);
if (!cpu.GetFlags().Has(FlagsRegister.Direction))
{
cpu.IncRegister(Register.DI, size);
}
else
{
cpu.DecRegister(Register.DI, size);
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
if (cpu.GetFlags().Has(FlagsRegister.Overflow))
{
cpu.Interrupt(4);
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
var al = cpu.GetRegisterU8(Register.AL);
var flags = cpu.GetFlags();
if ((al & 0xF) > 9 || flags.Has(FlagsRegister.Auxiliary))
{
var ah = cpu.GetRegisterU8(Register.AH);
al = (byte)((al + 6) & 0x0F);
ah++;
cpu.SetRegisterU8(Register.AH, ah);
flags |= FlagsRegister.Carry | FlagsRegister.Auxiliary;
}
else
{
al &= 0x0F;
flags &= ~(FlagsRegister.Carry | FlagsRegister.Auxiliary);
}
flags &= ~(FlagsRegister.Parity | FlagsRegister.Zero | FlagsRegister.Sign);
flags |= (InstructionHelper.ParityLookup[al] ? FlagsRegister.Parity : 0) |
(al == 0 ? FlagsRegister.Zero : 0) |
((al & 0x80) != 0 ? FlagsRegister.Sign : 0);
cpu.SetFlags(flags);
cpu.SetRegisterU8(Register.AL, al);
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
if (!cpu.GetFlags().Has(FlagsRegister.Overflow))
{
new JumpRelative().Dispatch(cpu, instruction);
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
var flags = cpu.GetFlags();
if (flags.Has(FlagsRegister.Zero) || flags.Has(FlagsRegister.Sign) != flags.Has(FlagsRegister.Overflow))
{
new JumpRelative().Dispatch(cpu, instruction);
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
var flags = cpu.GetFlags();
if (!flags.Has(FlagsRegister.Carry) && !flags.Has(FlagsRegister.Zero))
{
new JumpRelative().Dispatch(cpu, instruction);
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
cpu.DecRegister(Register.CX);
var counter = cpu.GetRegister(Register.CX);
if (counter != 0 && !cpu.GetFlags().Has(FlagsRegister.Zero))
{
new JumpRelative().Dispatch(cpu, instruction);
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
var al = cpu.GetRegisterU8(Register.AL);
var oldAl = al;
var flags = cpu.GetFlags();
var oldCarry = flags.Has(FlagsRegister.Carry);
flags &= ~FlagsRegister.Carry;
if ((al & 0xF) > 9 || flags.Has(FlagsRegister.Auxiliary))
{
al -= 6;
if (oldCarry || (al > oldAl))
{
flags |= FlagsRegister.Carry;
}
else
{
flags &= ~FlagsRegister.Carry;
}
flags |= FlagsRegister.Auxiliary;
}
else
{
flags &= ~FlagsRegister.Auxiliary;
}
if (oldAl > 0x99 || oldCarry)
{
al -= 0x60;
flags |= FlagsRegister.Carry;
}
else
{
flags &= ~FlagsRegister.Carry;
}
flags &= ~(FlagsRegister.Parity | FlagsRegister.Zero | FlagsRegister.Sign);
flags |= (InstructionHelper.ParityLookup[al] ? FlagsRegister.Parity : 0) |
(al == 0 ? FlagsRegister.Zero : 0) |
((al & 0x80) != 0 ? FlagsRegister.Sign : 0);
cpu.SetFlags(flags);
cpu.SetRegister(Register.AL, al);
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
var segment = Register.DS;
if (instruction.SegmentPrefix != Register.Invalid)
{
segment = instruction.SegmentPrefix;
}
ushort value1;
ushort value2;
byte size;
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
value1 = cpu.ReadU8(InstructionHelper.SegmentToAddress(cpu.GetRegister(segment), cpu.GetRegister(Register.SI)));
value2 = cpu.ReadU8(InstructionHelper.SegmentToAddress(cpu.GetRegister(Register.ES), cpu.GetRegister(Register.DI)));
size = 1;
}
else
{
value1 = cpu.ReadU16(InstructionHelper.SegmentToAddress(cpu.GetRegister(segment), cpu.GetRegister(Register.SI)));
value2 = cpu.ReadU16(InstructionHelper.SegmentToAddress(cpu.GetRegister(Register.ES), cpu.GetRegister(Register.DI)));
size = 2;
}
var result = value1 - value2;
InstructionHelper.CalculateSubFlags(cpu, instruction.Flag, value1, value2, result);
if (!cpu.GetFlags().Has(FlagsRegister.Direction))
{
cpu.SetRegister(Register.DI, (ushort)(cpu.GetRegister(Register.DI) + size));
cpu.SetRegister(Register.SI, (ushort)(cpu.GetRegister(Register.SI) + size));
}
else
{
cpu.SetRegister(Register.DI, (ushort)(cpu.GetRegister(Register.DI) - size));
cpu.SetRegister(Register.SI, (ushort)(cpu.GetRegister(Register.SI) - size));
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
var segment = Register.DS;
if (instruction.SegmentPrefix != Register.Invalid)
{
segment = instruction.SegmentPrefix;
}
var sourceAddress = InstructionHelper.SegmentToAddress(cpu.GetRegister(segment), cpu.GetRegister(Register.SI));
var destAddress = InstructionHelper.SegmentToAddress(cpu.GetRegister(Register.ES), cpu.GetRegister(Register.DI));
byte size;
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
var value = cpu.ReadU8(sourceAddress);
cpu.WriteU8(destAddress, value);
size = 1;
}
else
{
var value = cpu.ReadU16(sourceAddress);
cpu.WriteU16(destAddress, value);
size = 2;
}
if (!cpu.GetFlags().Has(FlagsRegister.Direction))
{
cpu.IncRegister(Register.DI, size);
cpu.IncRegister(Register.SI, size);
}
else
{
cpu.DecRegister(Register.DI, size);
cpu.DecRegister(Register.SI, size);
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
byte size;
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
cpu.WriteU8(InstructionHelper.SegmentToAddress(cpu.GetRegister(Register.ES), cpu.GetRegister(Register.DI)), (byte)(cpu.GetRegister(Register.AX) & 0xFF));
size = 1;
}
else
{
cpu.WriteU16(InstructionHelper.SegmentToAddress(cpu.GetRegister(Register.ES), cpu.GetRegister(Register.DI)), cpu.GetRegister(Register.AX));
size = 2;
}
if (!cpu.GetFlags().Has(FlagsRegister.Direction))
{
cpu.IncRegister(Register.DI, size);
}
else
{
cpu.DecRegister(Register.DI, size);
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
var value1 = InstructionHelper.GetInstructionValue(cpu, instruction.Flag, instruction.SegmentPrefix, instruction.Argument1, instruction.Argument1Value, instruction.Argument1Displacement);
var value2 = InstructionHelper.GetInstructionValue(cpu, instruction.Flag, instruction.SegmentPrefix, instruction.Argument2, instruction.Argument2Value, instruction.Argument2Displacement);
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
value1 &= 0xFF;
value2 &= 0xFF;
}
int result;
bool carry;
switch (instruction.Type)
{
case OpCodeManager.InstructionType.Adc:
result = value1 + value2 + (cpu.GetFlags().Has(FlagsRegister.Carry) ? 1 : 0);
InstructionHelper.CalculateAddFlags(cpu, instruction.Flag, value1, value2, result);
break;
case OpCodeManager.InstructionType.Add:
result = value1 + value2;
InstructionHelper.CalculateAddFlags(cpu, instruction.Flag, value1, value2, result);
break;
case OpCodeManager.InstructionType.And:
case OpCodeManager.InstructionType.Test:
result = value1 & value2;
InstructionHelper.CalculateBitwiseFlags(cpu, instruction.Flag, value1, value2, result);
break;
case OpCodeManager.InstructionType.Compare:
case OpCodeManager.InstructionType.Subtract:
result = value1 - value2;
InstructionHelper.CalculateSubFlags(cpu, instruction.Flag, value1, value2, result);
break;
case OpCodeManager.InstructionType.Or:
result = value1 | value2;
InstructionHelper.CalculateBitwiseFlags(cpu, instruction.Flag, value1, value2, result);
break;
case OpCodeManager.InstructionType.Rcl:
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
const int mask = 0x1FF;
var shift = (value2 & 0x1F) % 9;
result = (byte)value1;
if (cpu.Flags.Has(FlagsRegister.Carry))
{
result |= 0x100;
}
result = (byte)(result << shift) | (byte)(result >> (-shift & mask));
if ((result & 0x100) != 0)
{
cpu.Flags |= FlagsRegister.Carry;
}
else
{
cpu.Flags &= ~FlagsRegister.Carry;
}
if (value2 == 1)
{
if (((result & 0x100) != 0) ^ ((result & 0x80) != 0))
{
cpu.Flags |= FlagsRegister.Overflow;
}
else
{
cpu.Flags &= ~FlagsRegister.Overflow;
}
}
}
else
{
const int mask = 0x1FFFF;
var shift = (value2 & 0x1F) % 17;
result = value1;
if (cpu.Flags.Has(FlagsRegister.Carry))
{
result |= 0x10000;
}
result = (ushort)(result << shift) | (ushort)(result >> (-shift & mask));
if ((result & 0x10000) != 0)
{
cpu.Flags |= FlagsRegister.Carry;
}
else
{
cpu.Flags &= ~FlagsRegister.Carry;
}
if (value2 == 1)
{
if (((result & 0x10000) != 0) ^ ((result & 0x8000) != 0))
{
cpu.Flags |= FlagsRegister.Overflow;
}
else
{
cpu.Flags &= ~FlagsRegister.Overflow;
}
}
}
InstructionHelper.CalculateBitwiseFlags(cpu, instruction.Flag, value1, value2, result);
break;
case OpCodeManager.InstructionType.Rcr:
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
const int mask = 0x1FF;
var shift = (value2 & 0x1F) % 9;
result = (byte)value1;
if (cpu.Flags.Has(FlagsRegister.Carry))
{
result |= 0x100;
}
if ((result & 0x1) != 0)
{
cpu.Flags |= FlagsRegister.Carry;
}
else
{
cpu.Flags &= ~FlagsRegister.Carry;
}
result = (byte)(result >> shift) | (byte)(result << (-shift & mask));
if (value2 == 1)
{
if (((result & 0x80) != 0) ^ ((result & 0x40) != 0))
{
cpu.Flags |= FlagsRegister.Overflow;
}
else
{
cpu.Flags &= ~FlagsRegister.Overflow;
}
}
}
else
{
const int mask = 0x1FFFF;
var shift = (value2 & 0x1F) % 17;
result = value1;
if (cpu.Flags.Has(FlagsRegister.Carry))
{
result |= 0x10000;
}
if ((result & 0x1) != 0)
{
cpu.Flags |= FlagsRegister.Carry;
}
else
{
cpu.Flags &= ~FlagsRegister.Carry;
}
result = (ushort)(result >> shift) | (ushort)(result << (-shift & mask));
if (value2 == 1)
{
if (((result & 0x8000) != 0) ^ ((result & 0x4000) != 0))
{
cpu.Flags |= FlagsRegister.Overflow;
}
else
{
cpu.Flags &= ~FlagsRegister.Overflow;
}
}
}
//cpu.CalculateBitwiseFlags(instruction.Flag, value1, value2, result);
break;
case OpCodeManager.InstructionType.Rol:
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
const int mask = 0xFF;
var shift = value2 & mask;
result = (byte)(value1 << shift) | (byte)(value1 >> (-shift & mask));
}
else
{
const int mask = 0xFFFF;
var shift = value2 & mask;
result = (ushort)(value1 << shift) | (ushort)(value1 >> (-shift & mask));
}
InstructionHelper.CalculateBitwiseFlags(cpu, instruction.Flag, value1, value2, result);
break;
case OpCodeManager.InstructionType.Ror:
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
const int mask = 0xFF;
var shift = value2 & mask;
result = (byte)(value1 >> shift) | (byte)(value1 << (-shift & mask));
}
else
{
const int mask = 0xFFFF;
var shift = value2 & mask;
result = (ushort)(value1 >> shift) | (ushort)(value1 << (-shift & mask));
}
InstructionHelper.CalculateBitwiseFlags(cpu, instruction.Flag, value1, value2, result);
break;
case OpCodeManager.InstructionType.Sbb:
result = value1 - (value2 + (cpu.GetFlags().Has(FlagsRegister.Carry) ? 1 : 0));
InstructionHelper.CalculateSubFlags(cpu, instruction.Flag, value1, value2, result);
break;
case OpCodeManager.InstructionType.Shl:
bool overflow;
result = value1 << (value2 & 0x1F);
InstructionHelper.CalculateBitwiseFlags(cpu, instruction.Flag, value1, (ushort)(value2 & 0x1F), result);
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
carry = (result & 0x100) != 0;
overflow = (result & 0x80) != 0;
}
else
{
carry = (result & 0x10000) != 0;
overflow = (result & 0x8000) != 0;
}
if (carry)
{
cpu.Flags |= FlagsRegister.Carry;
}
if ((value2 & 0x1F) == 1 && overflow ^ carry)
{
cpu.Flags |= FlagsRegister.Overflow;
}
break;
case OpCodeManager.InstructionType.Sar:
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
carry = (((sbyte)value1 >> ((value2 & 0x1F) - 1)) & 1) != 0;
result = (sbyte)value1 >> (value2 & 0x1F);
}
else
{
carry = (((short)value1 >> ((value2 & 0x1F) - 1)) & 1) != 0;
result = (short)value1 >> (value2 & 0x1F);
}
InstructionHelper.CalculateBitwiseFlags(cpu, instruction.Flag, value1, (ushort)(value2 & 0x1F), result);
if (carry)
{
cpu.Flags |= FlagsRegister.Carry;
}
break;
case OpCodeManager.InstructionType.Shr:
carry = ((value1 >> ((value2 & 0x1F) - 1)) & 1) != 0;
result = value1 >> (value2 & 0x1F);
InstructionHelper.CalculateBitwiseFlags(cpu, instruction.Flag, value1, (ushort)(value2 & 0x1F), result);
if (carry)
{
cpu.Flags |= FlagsRegister.Carry;
}
if ((value2 & 0x1F) == 1)
{
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
if ((value1 & 0x80) != 0)
{
cpu.Flags |= FlagsRegister.Overflow;
}
}
else
{
if ((value1 & 0x8000) != 0)
{
cpu.Flags |= FlagsRegister.Overflow;
}
}
}
break;
case OpCodeManager.InstructionType.Xor:
result = value1 ^ value2;
InstructionHelper.CalculateBitwiseFlags(cpu, instruction.Flag, value1, value2, result);
break;
default:
throw new NotImplementedException();
}
var truncResult = instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8) ? (byte)result : (ushort)result;
if (instruction.Type != OpCodeManager.InstructionType.Compare && instruction.Type != OpCodeManager.InstructionType.Test)
{
switch (instruction.Argument1)
{
case (int)Register.AX:
case (int)Register.CX:
case (int)Register.DX:
case (int)Register.BX:
case (int)Register.SP:
case (int)Register.BP:
case (int)Register.SI:
case (int)Register.DI:
case (int)Register.IP:
case (int)Register.CS:
case (int)Register.DS:
case (int)Register.ES:
case (int)Register.SS:
cpu.SetRegister((Register)instruction.Argument1, truncResult);
break;
case OpCodeManager.ARG_BYTE_REGISTER:
cpu.SetRegisterU8((Register)instruction.Argument1Value, (byte)truncResult);
break;
case OpCodeManager.ARG_DEREFERENCE:
case OpCodeManager.ARG_MEMORY:
var address = InstructionHelper.GetInstructionRealAddress(cpu, instruction.SegmentPrefix, instruction.Argument1, instruction.Argument1Value, instruction.Argument1Displacement);
if (instruction.Flag.Has(OpCodeManager.OpCodeFlag.Size8))
{
cpu.WriteU8(address, (byte)truncResult);
}
else
{
cpu.WriteU16(address, truncResult);
}
break;
default:
throw new NotImplementedException();
}
}
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
cpu.SetFlags(cpu.GetFlags() | FlagsRegister.Interrupt);
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction) => cpu.SetRegister(Register.AH, (byte)cpu.GetFlags());
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
cpu.SetFlags(cpu.GetFlags() & ~FlagsRegister.Direction);
}
public void Dispatch(Cpu8086 cpu, OpCodeManager.Instruction instruction)
{
ushort counter;
switch (instruction.OpcodePrefix)
{
case 0:
new OneStringOperation().Dispatch(cpu, instruction);
break;
case 0xF2:
counter = cpu.GetRegister(Register.CX);
if (instruction.Type == OpCodeManager.InstructionType.Cmps || instruction.Type == OpCodeManager.InstructionType.Scas)
{
while (counter != 0)
{
new OneStringOperation().Dispatch(cpu, instruction);
counter--;
if (cpu.GetFlags().Has(FlagsRegister.Zero))
{
break;
}
}
}
else
{
while (counter != 0)
{
new OneStringOperation().Dispatch(cpu, instruction);
counter--;
}
}
cpu.SetRegister(Register.CX, counter);
break;
case 0xF3:
counter = cpu.GetRegister(Register.CX);
if (instruction.Type == OpCodeManager.InstructionType.Cmps || instruction.Type == OpCodeManager.InstructionType.Scas)
{
while (counter != 0)
{
new OneStringOperation().Dispatch(cpu, instruction);
counter--;
if (!cpu.GetFlags().Has(FlagsRegister.Zero))
{
break;
}
}
}
else
{
while (counter != 0)
{
new OneStringOperation().Dispatch(cpu, instruction);
counter--;
}
}
cpu.SetRegister(Register.CX, counter);
break;
default:
throw new NotImplementedException();
}
}