protected static void m6803_mem(address_map map, device_t owner)
{
m6801_cpu_device m6801 = (m6801_cpu_device)owner;
m6801_io(map, m6801);
map.op(0x0080, 0x00ff).ram(); /* 6803 internal RAM */
}
// device_disasm_interface overrides
//virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
protected static void m6803_mem(address_map map, device_t owner)
{
m6801_cpu_device m6801 = (m6801_cpu_device)owner;
map.op(0x0000, 0x001f).rw(m6801.m6801_io_r, m6801.m6801_io_w);
map.op(0x0020, 0x007f).noprw(); /* unused */
map.op(0x0080, 0x00ff).ram(); /* 6803 internal RAM */
}
//auto in_p3_cb() { return m_in_port_func[2].bind(); }
//auto out_p3_cb() { return m_out_port_func[2].bind(); }
//auto in_p4_cb() { return m_in_port_func[3].bind(); }
//auto out_p4_cb() { return m_out_port_func[3].bind(); }
//auto out_sc2_cb() { return m_out_sc2_func.bind(); }
//auto out_ser_tx_cb() { return m_out_sertx_func.bind(); }
static void m6801_io(address_map map, m6801_cpu_device m6801) // FIXME: privatize this
{
map.op(0x0000, 0x0000).rw(m6801.ff_r, m6801.p1_ddr_w);
map.op(0x0001, 0x0001).rw(m6801.ff_r, m6801.p2_ddr_w);
map.op(0x0002, 0x0002).rw(m6801.p1_data_r, m6801.p1_data_w);
map.op(0x0003, 0x0003).rw(m6801.p2_data_r, m6801.p2_data_w);
map.op(0x0004, 0x0004).rw(m6801.ff_r, m6801.p3_ddr_w); // TODO: external in 6801 modes 0�& 6
map.op(0x0005, 0x0005).rw(m6801.ff_r, m6801.p4_ddr_w); // TODO: external in 6801 modes 0�
map.op(0x0006, 0x0006).rw(m6801.p3_data_r, m6801.p3_data_w); // TODO: external in 6801 modes 0�& 6
map.op(0x0007, 0x0007).rw(m6801.p4_data_r, m6801.p4_data_w); // TODO: external in 6801 modes 0�
map.op(0x0008, 0x0008).rw(m6801.tcsr_r, m6801.tcsr_w);
map.op(0x0009, 0x0009).rw(m6801.ch_r, m6801.ch_w);
map.op(0x000a, 0x000a).rw(m6801.cl_r, m6801.cl_w);
map.op(0x000b, 0x000b).rw(m6801.ocrh_r, m6801.ocrh_w);
map.op(0x000c, 0x000c).rw(m6801.ocrl_r, m6801.ocrl_w);
map.op(0x000d, 0x000d).r(m6801.icrh_r);
map.op(0x000e, 0x000e).r(m6801.icrl_r);
map.op(0x000f, 0x000f).rw(m6801.p3_csr_r, m6801.p3_csr_w); // TODO: external in 6801 modes 0� 5 & 6
map.op(0x0010, 0x0010).rw(m6801.sci_rmcr_r, m6801.sci_rmcr_w);
map.op(0x0011, 0x0011).rw(m6801.sci_trcsr_r, m6801.sci_trcsr_w);
map.op(0x0012, 0x0012).r(m6801.sci_rdr_r);
map.op(0x0013, 0x0013).w(m6801.sci_tdr_w);
map.op(0x0014, 0x0014).rw(m6801.rcr_r, m6801.rcr_w);
}
public override void execute_set_input(int irqline, int state)
{
m6801_cpu_device m6801 = (m6801_cpu_device)device(); m6801.device_execute_interface_execute_set_input(irqline, state);
}
