/// <summary>
/// Synthesizes the design.
/// </summary>
/// <param name="destPath">target path which will contain the generated files</param>
/// <param name="designName">name of the design</param>
/// <param name="twinProject">optional twin project</param>
/// <param name="step">what stages of the overall flow to execute</param>
/// <returns>the generated ISE project</returns>
public XilinxProject Synthesize(string destPath, string designName, IProject twinProject = null, EFlowStep step = EFlowStep.IPCores)
{
EISEVersion iseVersion = EISEVersion._11_2;
ISEInfo info = ISEDetector.DetectMostRecentISEInstallation();
if (info != null)
{
iseVersion = info.VersionTag;
}
return(Synthesize(destPath, designName, iseVersion, twinProject, step));
}
/// <summary>
/// Synthesizes the design.
/// </summary>
/// <param name="destPath">target path which will contain the generated files</param>
/// <param name="designName">name of the design</param>
/// <param name="iseVersion">ISE version to generate for</param>
/// <param name="twinProject">optional twin project</param>
/// <param name="step">what stages of the overall flow to execute</param>
/// <returns>the generated ISE project</returns>
public XilinxProject Synthesize(string destPath, string designName, EISEVersion iseVersion,
IProject twinProject = null, EFlowStep step = EFlowStep.HDLGenAndIPCores)
{
ISEInfo info = ISEDetector.LocateISEByVersion(iseVersion);
if (info == null)
{
info = new ISEInfo()
{
VersionTag = iseVersion
}
}
;
return(Synthesize(destPath, designName, info, twinProject, step));
}
/// <summary>
/// Synthesizes the design.
/// </summary>
/// <param name="destPath">target path which will contain the generated files</param>
/// <param name="designName">name of the design</param>
/// <param name="info">ISE information</param>
/// <param name="twinProject">optional twin project</param>
/// <param name="step">what stages of the overall flow to execute</param>
/// <returns>the generated ISE project</returns>
public XilinxProject Synthesize(string destPath, string designName, ISEInfo info,
IProject twinProject = null, EFlowStep step = EFlowStep.HDLGenAndIPCores)
{
// Now convert the design to VHDL and embed it into a Xilinx ISE project
XilinxProject project = new XilinxProject(destPath, designName)
{
TwinProject = twinProject
};
project.ISEVersion = info.VersionTag;
if (info.Path == null)
{
project.SkipIPCoreSynthesis = true;
}
else
{
project.ISEBinPath = info.Path;
}
project.PutProperty(EXilinxProjectProperties.DeviceFamily, Device.GetFamily());
project.PutProperty(EXilinxProjectProperties.Device, Device);
project.PutProperty(EXilinxProjectProperties.Package, Package);
project.PutProperty(EXilinxProjectProperties.SpeedGrade, SpeedGrade);
project.SetVHDLProfile();
if (!step.HasFlag(EFlowStep.IPCores))
{
project.SkipIPCoreSynthesis = true;
}
project.TopLevelComponent = TopLevelComponent.Descriptor;
CreateUCF(project);
VHDLGenerator codeGen = new VHDLGenerator();
SynthesisEngine.Create(DesignContext.Instance, project).Synthesize(GetComponentSet(), codeGen);
project.Save();
if (step.HasFlag(EFlowStep.XST) ||
step.HasFlag(EFlowStep.NGDBuild) ||
step.HasFlag(EFlowStep.Map) ||
step.HasFlag(EFlowStep.PAR) ||
step.HasFlag(EFlowStep.TRCE))
{
var flow = project.ConfigureFlow(TopLevelComponent);
flow.Start(step);
}
return(project);
}
/// <summary>
/// Constructs an instance.
/// </summary>
/// <param name="projectPath">path to the project file</param>
/// <param name="projectName">project name</param>
public XilinxProject(string projectPath, string projectName)
{
if (!Directory.Exists(projectPath))
{
Directory.CreateDirectory(projectPath);
}
ProjectPath = projectPath;
ProjectName = projectName;
ISEInfo info = ISEDetector.DetectMostRecentISEInstallation();
if (info != null)
{
ISEVersion = info.VersionTag;
ISEBinPath = info.Path;
}
PreInitializeProperties();
}
/// <summary>
/// Detects and enumerates all ISE installations.
/// </summary>
public static IEnumerable<ISEInfo> DetectISEInstallations()
{
string[] rootDirs = new string[] { "C:\\Xilinx" };
string[] dsDirs = new string[] { "ISE_DS", "" };
string[] iseDirs = new string[] { "ISE" };
string[] binDirs = new string[] { "bin" };
string[] ntDirs =
Environment.Is64BitOperatingSystem ?
new string[] { "nt64", "nt" } :
new string[] { "nt" };
string[] subdirs = null;
try
{
subdirs = Directory.EnumerateDirectories(rootDirs[0]).ToArray();
}
catch (Exception)
{
yield break;
}
string probeExe = "coregen.exe";
string fileSetTxt = "fileset.txt";
foreach (string subdir in subdirs)
{
string verText = subdir.Split(
Path.DirectorySeparatorChar,
Path.AltDirectorySeparatorChar).Last();
foreach (string path in CombineDirs(new string[] { subdir }, dsDirs, iseDirs, binDirs, ntDirs))
{
string probePath = Path.Combine(path, probeExe);
bool exists = false;
try
{
exists = File.Exists(probePath);
}
catch (Exception)
{
}
if (exists)
{
string[] dirs = path.Split(
Path.DirectorySeparatorChar,
Path.AltDirectorySeparatorChar);
// Combine doesn't add this:
dirs[0] = dirs[0] + Path.DirectorySeparatorChar;
string iseHome = Path.Combine(dirs.Take(dirs.Length - 2).ToArray());
string fileSetPath = Path.Combine(iseHome, fileSetTxt);
try
{
string text = File.ReadAllText(fileSetPath);
Regex regex = new Regex(@"version=(?<version>\d\d\.\d)");
var matches = regex.Matches(text);
if (matches.Count > 0)
{
verText = matches[matches.Count - 1].Result("${version}");
}
}
catch (Exception)
{
}
ISEInfo info = new ISEInfo();
info.Path = path;
info.VersionText = verText;
EISEVersion version;
GetISEVersionFromText(info.VersionText, out version);
info.VersionTag = version;
yield return info;
break;
}
}
}
}
/// <summary>
/// Detects and enumerates all ISE installations.
/// </summary>
public static IEnumerable <ISEInfo> DetectISEInstallations()
{
string[] rootDirs = new string[] { "C:\\Xilinx" };
string[] dsDirs = new string[] { "ISE_DS", "" };
string[] iseDirs = new string[] { "ISE" };
string[] binDirs = new string[] { "bin" };
string[] ntDirs =
Environment.Is64BitOperatingSystem ?
new string[] { "nt64", "nt" } :
new string[] { "nt" };
string[] subdirs = null;
try
{
subdirs = Directory.EnumerateDirectories(rootDirs[0]).ToArray();
}
catch (Exception)
{
yield break;
}
string probeExe = "coregen.exe";
string fileSetTxt = "fileset.txt";
foreach (string subdir in subdirs)
{
string verText = subdir.Split(
Path.DirectorySeparatorChar,
Path.AltDirectorySeparatorChar).Last();
foreach (string path in CombineDirs(new string[] { subdir }, dsDirs, iseDirs, binDirs, ntDirs))
{
string probePath = Path.Combine(path, probeExe);
bool exists = false;
try
{
exists = File.Exists(probePath);
}
catch (Exception)
{
}
if (exists)
{
string[] dirs = path.Split(
Path.DirectorySeparatorChar,
Path.AltDirectorySeparatorChar);
// Combine doesn't add this:
dirs[0] = dirs[0] + Path.DirectorySeparatorChar;
string iseHome = Path.Combine(dirs.Take(dirs.Length - 2).ToArray());
string fileSetPath = Path.Combine(iseHome, fileSetTxt);
try
{
string text = File.ReadAllText(fileSetPath);
Regex regex = new Regex(@"version=(?<version>\d\d\.\d)");
var matches = regex.Matches(text);
if (matches.Count > 0)
{
verText = matches[matches.Count - 1].Result("${version}");
}
}
catch (Exception)
{
}
ISEInfo info = new ISEInfo();
info.Path = path;
info.VersionText = verText;
EISEVersion version;
GetISEVersionFromText(info.VersionText, out version);
info.VersionTag = version;
yield return(info);
break;
}
}
}
}
/// <summary>
/// Synthesizes the design.
/// </summary>
/// <param name="destPath">target path which will contain the generated files</param>
/// <param name="designName">name of the design</param>
/// <param name="iseVersion">ISE version to generate for</param>
/// <param name="twinProject">optional twin project</param>
/// <param name="step">what stages of the overall flow to execute</param>
/// <returns>the generated ISE project</returns>
public XilinxProject Synthesize(string destPath, string designName, EISEVersion iseVersion,
IProject twinProject = null, EFlowStep step = EFlowStep.HDLGenAndIPCores)
{
ISEInfo info = ISEDetector.LocateISEByVersion(iseVersion);
if (info == null)
info = new ISEInfo() { VersionTag = iseVersion };
return Synthesize(destPath, designName, info, twinProject, step);
}
/// <summary>
/// Synthesizes the design.
/// </summary>
/// <param name="destPath">target path which will contain the generated files</param>
/// <param name="designName">name of the design</param>
/// <param name="info">ISE information</param>
/// <param name="twinProject">optional twin project</param>
/// <param name="step">what stages of the overall flow to execute</param>
/// <returns>the generated ISE project</returns>
public XilinxProject Synthesize(string destPath, string designName, ISEInfo info,
IProject twinProject = null, EFlowStep step = EFlowStep.HDLGenAndIPCores)
{
// Now convert the design to VHDL and embed it into a Xilinx ISE project
XilinxProject project = new XilinxProject(destPath, designName)
{
TwinProject = twinProject
};
project.ISEVersion = info.VersionTag;
if (info.Path == null)
project.SkipIPCoreSynthesis = true;
else
project.ISEBinPath = info.Path;
project.PutProperty(EXilinxProjectProperties.DeviceFamily, Device.GetFamily());
project.PutProperty(EXilinxProjectProperties.Device, Device);
project.PutProperty(EXilinxProjectProperties.Package, Package);
project.PutProperty(EXilinxProjectProperties.SpeedGrade, SpeedGrade);
project.SetVHDLProfile();
if (!step.HasFlag(EFlowStep.IPCores))
project.SkipIPCoreSynthesis = true;
project.TopLevelComponent = TopLevelComponent.Descriptor;
CreateUCF(project);
VHDLGenerator codeGen = new VHDLGenerator();
SynthesisEngine.Create(DesignContext.Instance, project).Synthesize(GetComponentSet(), codeGen);
project.Save();
if (step.HasFlag(EFlowStep.XST) ||
step.HasFlag(EFlowStep.NGDBuild) ||
step.HasFlag(EFlowStep.Map) ||
step.HasFlag(EFlowStep.PAR) ||
step.HasFlag(EFlowStep.TRCE))
{
var flow = project.ConfigureFlow(TopLevelComponent);
flow.Start(step);
}
return project;
}
