public static Operand IConvertU32ToFP64(this EmitterContext context, Operand a) { return(context.Add(Instruction.ConvertU32ToFP64, Local(), a)); }
public static Operand BitwiseExclusiveOr(this EmitterContext context, Operand a, Operand b) { return(context.Add(Instruction.BitwiseExclusiveOr, Local(), a, b)); }
private static Operation[] DecodeShader(ulong address, IGpuAccessor gpuAccessor, TranslationFlags flags, out ShaderConfig config) { Block[] cfg; if ((flags & TranslationFlags.Compute) != 0) { config = new ShaderConfig(gpuAccessor, flags); cfg = Decoder.Decode(gpuAccessor, address); } else { config = new ShaderConfig(new ShaderHeader(gpuAccessor, address), gpuAccessor, flags); cfg = Decoder.Decode(gpuAccessor, address + HeaderSize); } if (cfg == null) { gpuAccessor.Log("Invalid branch detected, failed to build CFG."); return(Array.Empty <Operation>()); } EmitterContext context = new EmitterContext(config); ulong maxEndAddress = 0; for (int blkIndex = 0; blkIndex < cfg.Length; blkIndex++) { Block block = cfg[blkIndex]; if (maxEndAddress < block.EndAddress) { maxEndAddress = block.EndAddress; } context.CurrBlock = block; context.MarkLabel(context.GetLabel(block.Address)); for (int opIndex = 0; opIndex < block.OpCodes.Count; opIndex++) { OpCode op = block.OpCodes[opIndex]; if ((flags & TranslationFlags.DebugMode) != 0) { string instName; if (op.Emitter != null) { instName = op.Emitter.Method.Name; } else { instName = "???"; gpuAccessor.Log($"Invalid instruction at 0x{op.Address:X6} (0x{op.RawOpCode:X16})."); } string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}"; context.Add(new CommentNode(dbgComment)); } if (op.NeverExecute) { continue; } Operand predSkipLbl = null; bool skipPredicateCheck = op is OpCodeBranch opBranch && !opBranch.PushTarget; if (op is OpCodeBranchPop opBranchPop) { // If the instruction is a SYNC or BRK instruction with only one // possible target address, then the instruction is basically // just a simple branch, we can generate code similar to branch // instructions, with the condition check on the branch itself. skipPredicateCheck = opBranchPop.Targets.Count < 2; } if (!(op.Predicate.IsPT || skipPredicateCheck)) { Operand label; if (opIndex == block.OpCodes.Count - 1 && block.Next != null) { label = context.GetLabel(block.Next.Address); } else { label = Label(); predSkipLbl = label; } Operand pred = Register(op.Predicate); if (op.InvertPredicate) { context.BranchIfTrue(label, pred); } else { context.BranchIfFalse(label, pred); } } context.CurrOp = op; op.Emitter?.Invoke(context); if (predSkipLbl != null) { context.MarkLabel(predSkipLbl); } } } config.SizeAdd((int)maxEndAddress + (flags.HasFlag(TranslationFlags.Compute) ? 0 : HeaderSize)); return(context.GetOperations()); }
public static Operand BitfieldExtractU32(this EmitterContext context, Operand a, Operand b, Operand c) { return(context.Add(Instruction.BitfieldExtractU32, Local(), a, b, c)); }
public static Operand BitfieldInsert(this EmitterContext context, Operand a, Operand b, Operand c, Operand d) { return(context.Add(Instruction.BitfieldInsert, Local(), a, b, c, d)); }
public static Operand StoreGlobal8(this EmitterContext context, Operand a, Operand b, Operand c) { return(context.Add(Instruction.StoreGlobal8, null, a, b, c)); }
public static Operand StoreShared8(this EmitterContext context, Operand a, Operand b) { return(context.Add(Instruction.StoreShared8, null, a, b)); }
public static Operand LoadGlobal(this EmitterContext context, Operand a, Operand b) { return(context.Add(Instruction.LoadGlobal, Local(), a, b)); }
public static Operand LoadShared(this EmitterContext context, Operand a) { return(context.Add(Instruction.LoadShared, Local(), a)); }
public static Operand IsNan(this EmitterContext context, Operand a) { return(context.Add(Instruction.IsNan, Local(), a)); }
public static Operand LoadAttribute(this EmitterContext context, Operand a, Operand b, Operand c) { return(context.Add(Instruction.LoadAttribute, Local(), a, b, c)); }
public static Operand ISubtract(this EmitterContext context, Operand a, Operand b) { return(context.Add(Instruction.Subtract, Local(), a, b)); }
public static Operand INegate(this EmitterContext context, Operand a) { return(context.Add(Instruction.Negate, Local(), a)); }
public static Operand IMinimumU32(this EmitterContext context, Operand a, Operand b) { return(context.Add(Instruction.MinimumU32, Local(), a, b)); }
public static (Operand, Operand) ShuffleXor(this EmitterContext context, Operand a, Operand b, Operand c) { return(context.Add(Instruction.ShuffleXor, (Local(), Local()), a, b, c)); }
public static Operand MultiplyHighU32(this EmitterContext context, Operand a, Operand b) { return(context.Add(Instruction.MultiplyHighU32, Local(), a, b)); }
public static Operand StoreAttribute(this EmitterContext context, Operand a, Operand b, Operand c) { return(context.Add(Instruction.StoreAttribute, null, a, b, c)); }
public static Operand PackDouble2x32(this EmitterContext context, Operand a, Operand b) { return(context.Add(Instruction.PackDouble2x32, Local(), a, b)); }
public static Operand BitCount(this EmitterContext context, Operand a) { return(context.Add(Instruction.BitCount, Local(), a)); }
public static Operand PackHalf2x16(this EmitterContext context, Operand a, Operand b) { return(context.Add(Instruction.PackHalf2x16, Local(), a, b)); }
public static Operand VoteAny(this EmitterContext context, Operand a) { return(context.Add(Instruction.VoteAny, Local(), a)); }
public static void Return(this EmitterContext context) { context.PrepareForReturn(); context.Add(Instruction.Return); }
public static Operand AtomicAdd(this EmitterContext context, Instruction mr, Operand a, Operand b, Operand c) { return(context.Add(Instruction.AtomicAdd | mr, Local(), a, b, c)); }
public static void Return(this EmitterContext context, Operand returnValue) { context.PrepareForReturn(); context.Add(Instruction.Return, null, returnValue); }
public static Operand BitfieldReverse(this EmitterContext context, Operand a) { return(context.Add(Instruction.BitfieldReverse, Local(), a)); }
public static Operand ShiftRightU32(this EmitterContext context, Operand a, Operand b) { return(context.Add(Instruction.ShiftRightU32, Local(), a, b)); }
private static void EmitOps(EmitterContext context, Block block) { for (int opIndex = 0; opIndex < block.OpCodes.Count; opIndex++) { InstOp op = block.OpCodes[opIndex]; if (context.Config.Options.Flags.HasFlag(TranslationFlags.DebugMode)) { string instName; if (op.Emitter != null) { instName = op.Name.ToString(); } else { instName = "???"; context.Config.GpuAccessor.Log($"Invalid instruction at 0x{op.Address:X6} (0x{op.RawOpCode:X16})."); } string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}"; context.Add(new CommentNode(dbgComment)); } InstConditional opConditional = new InstConditional(op.RawOpCode); bool noPred = op.Props.HasFlag(InstProps.NoPred); if (!noPred && opConditional.Pred == RegisterConsts.PredicateTrueIndex && opConditional.PredInv) { continue; } Operand predSkipLbl = null; if (Decoder.IsPopBranch(op.Name)) { // If the instruction is a SYNC or BRK instruction with only one // possible target address, then the instruction is basically // just a simple branch, we can generate code similar to branch // instructions, with the condition check on the branch itself. noPred = block.SyncTargets.Count <= 1; } else if (op.Name == InstName.Bra) { noPred = true; } if (!(opConditional.Pred == RegisterConsts.PredicateTrueIndex || noPred)) { Operand label; if (opIndex == block.OpCodes.Count - 1 && block.HasNext()) { label = context.GetLabel(block.Successors[0].Address); } else { label = Label(); predSkipLbl = label; } Operand pred = Register(opConditional.Pred, RegisterType.Predicate); if (opConditional.PredInv) { context.BranchIfTrue(label, pred); } else { context.BranchIfFalse(label, pred); } } context.CurrOp = op; op.Emitter?.Invoke(context); if (predSkipLbl != null) { context.MarkLabel(predSkipLbl); } } }
public static Operand Barrier(this EmitterContext context) { return(context.Add(Instruction.Barrier)); }
private static void EmitOps(EmitterContext context, Block block) { for (int opIndex = 0; opIndex < block.OpCodes.Count; opIndex++) { OpCode op = block.OpCodes[opIndex]; if ((context.Config.Options.Flags & TranslationFlags.DebugMode) != 0) { string instName; if (op.Emitter != null) { instName = op.Emitter.Method.Name; } else { instName = "???"; context.Config.GpuAccessor.Log($"Invalid instruction at 0x{op.Address:X6} (0x{op.RawOpCode:X16})."); } string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}"; context.Add(new CommentNode(dbgComment)); } if (op.NeverExecute) { continue; } Operand predSkipLbl = null; bool skipPredicateCheck = op is OpCodeBranch opBranch && !opBranch.PushTarget; if (op is OpCodeBranchPop opBranchPop) { // If the instruction is a SYNC or BRK instruction with only one // possible target address, then the instruction is basically // just a simple branch, we can generate code similar to branch // instructions, with the condition check on the branch itself. skipPredicateCheck = opBranchPop.Targets.Count < 2; } if (!(op.Predicate.IsPT || skipPredicateCheck)) { Operand label; if (opIndex == block.OpCodes.Count - 1 && block.Next != null) { label = context.GetLabel(block.Next.Address); } else { label = Label(); predSkipLbl = label; } Operand pred = Register(op.Predicate); if (op.InvertPredicate) { context.BranchIfTrue(label, pred); } else { context.BranchIfFalse(label, pred); } } context.CurrOp = op; op.Emitter?.Invoke(context); if (predSkipLbl != null) { context.MarkLabel(predSkipLbl); } } }
public static Operand ICompareNotEqual(this EmitterContext context, Operand a, Operand b) { return(context.Add(Instruction.CompareNotEqual, Local(), a, b)); }