public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
TraceDecoder(wInstr, bitfields, tag);
var val = Bitfield.ReadFields(this.bitfields, wInstr);
return(decoders[val].Decode(dasm, wInstr));
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
var rn = Registers.GpRegs[SBitfield(wInstr, 16, 4)];
var registers = (ushort)wInstr;
var w = SBitfield(wInstr, 16 + 5, 1) != 0;
var l = SBitfield(wInstr, 16 + 4, 1);
// writeback
if (rn == Registers.sp)
{
return(new T32Instruction
{
opcode = l != 0 ? Opcode.pop : Opcode.push,
iclass = InstrClass.Linear,
Wide = true,
Writeback = w,
ops = new MachineOperand[] { new MultiRegisterOperand(Registers.GpRegs, PrimitiveType.Word16, (registers)) }
});
}
else
{
return(new T32Instruction
{
opcode = opcode,
iclass = InstrClass.Linear,
Writeback = w,
ops = new MachineOperand[] {
new RegisterOperand(rn),
new MultiRegisterOperand(Registers.GpRegs, PrimitiveType.Word16, (registers))
}
});
}
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
TraceDecoder(wInstr, shift, mask, debugString);
var op = (wInstr >> shift) & mask;
return(decoders[op].Decode(dasm, wInstr));
}
public override AArch32Instruction Decode(uint wInstr, T32Disassembler dasm)
{
var rn = Registers.GpRegs[SBitfield(wInstr, 16, 4)];
var registers = (ushort)wInstr;
var w = SBitfield(wInstr, 16 + 5, 1) != 0;
var l = SBitfield(wInstr, 16 + 4, 1);
// writeback
if (rn == Registers.sp)
{
return(new T32Instruction
{
Mnemonic = l != 0 ? Mnemonic.pop : Mnemonic.push,
InstructionClass = InstrClass.Linear,
Wide = true,
Writeback = w,
Operands = new MachineOperand[] { new MultiRegisterOperand(Registers.GpRegs, PrimitiveType.Word16, registers) }
});
}
else
{
return(new T32Instruction
{
Mnemonic = mnemonic,
InstructionClass = InstrClass.Linear,
Writeback = w,
Operands = new MachineOperand[] {
new RegisterOperand(rn),
new MultiRegisterOperand(Registers.GpRegs, PrimitiveType.Word16, registers)
}
});
}
}
public override AArch32Instruction Decode(uint wInstr, T32Disassembler dasm)
{
// A hack -- we patch up the output of the regular decoder.
var instr = base.Decode(wInstr, dasm);
ImmediateOperand opLsb;
ImmediateOperand opMsb;
if (instr.Operands.Length > 3)
{
opMsb = (ImmediateOperand)instr.Operands[3];
opLsb = (ImmediateOperand)instr.Operands[2];
}
else
{
opMsb = (ImmediateOperand)instr.Operands[2];
opLsb = (ImmediateOperand)instr.Operands[1];
}
var opWidth = ImmediateOperand.Word32(opMsb.Value.ToInt32() - opLsb.Value.ToInt32() + 1);
if (instr.Operands.Length > 3)
{
instr.Operands[3] = opWidth;
}
else
{
instr.Operands[2] = opWidth;
}
return(instr);
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
TraceDecoder(wInstr, fieldSpecifier, null);
var n = Bitfield.ReadFields(fieldSpecifier, wInstr);
var decoder = (predicate(n) ? trueDecoder : falseDecoder);
return(decoder.Decode(dasm, wInstr));
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
var instr = base.Decode(dasm, wInstr);
if (instr.ops[2] is ImmediateOperand imm && imm.Value.IsIntegerZero)
{
instr.opcode = Opcode.mov;
}
return(instr);
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
uint val = 0;
foreach (var(pos, size, submask) in bitfields)
{
val = (val << size) | ((wInstr >> pos) & submask);
}
return(decoders[val].Decode(dasm, wInstr));
}
public override AArch32Instruction Decode(uint wInstr, T32Disassembler dasm)
{
var instr = base.Decode(wInstr, dasm);
if (instr.Operands[2] is ImmediateOperand imm && imm.Value.IsIntegerZero)
{
instr.Mnemonic = Mnemonic.mov;
}
return(instr);
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
if (!dasm.rdr.TryReadLeUInt16(out var wNext))
{
return(null);
}
wInstr = (wInstr << 16) | wNext;
TraceDecoder(wInstr, 9 + 16, 0xF, null);
return(decoders[SBitfield(wInstr, 9 + 16, 4)].Decode(dasm, wInstr));
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
var instr = new AArch32Instruction
{
opcode = Opcode.it,
condition = (ArmCondition)SBitfield(wInstr, 4, 4),
itmask = (byte)SBitfield(wInstr, 0, 4)
};
// Add an extra bit for the 't' in 'it'.
dasm.itState = instr.itmask | (SBitfield(wInstr, 4, 1) << 4);
dasm.itCondition = instr.condition;
return(instr);
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
dasm.state.opcode = this.opcode;
dasm.state.iclass = this.iclass;
for (int i = 0; i < mutators.Length; ++i)
{
if (!mutators[i](wInstr, dasm))
{
return(dasm.Invalid());
}
}
var instr = dasm.state.MakeInstruction();
return(instr);
}
public override AArch32Instruction Decode(uint wInstr, T32Disassembler dasm)
{
var instr = new T32Instruction
{
opcode = Mnemonic.it,
InstructionClass = InstrClass.Linear,
condition = (ArmCondition)SBitfield(wInstr, 4, 4),
itmask = (byte)SBitfield(wInstr, 0, 4)
};
// Add an extra bit for the 't' in 'it'.
dasm.itState = instr.itmask | (SBitfield(wInstr, 4, 1) << 4);
dasm.itCondition = instr.condition;
return(instr);
}
public override AArch32Instruction Decode(uint wInstr, T32Disassembler dasm)
{
var s = SBitfield(wInstr, 10 + 16, 1);
var i1 = 1 & ~(SBitfield(wInstr, 13, 1) ^ s);
var i2 = 1 & ~(SBitfield(wInstr, 11, 1) ^ s);
var off = (int)Bits.SignExtend((uint)s, 1);
off = (off << 2) | (i1 << 1) | i2;
off = (off << 10) | SBitfield(wInstr, 16, 10);
off = (off << 11) | SBitfield(wInstr, 0, 11);
off <<= 1;
return(new T32Instruction
{
Mnemonic = Mnemonic.bl,
Operands = new MachineOperand[] { AddressOperand.Create(dasm.addr + (off + 4)) }
});
}
public override AArch32Instruction Decode(uint wInstr, T32Disassembler dasm)
{
DumpMaskedInstruction(wInstr, 0, this.mnemonic);
dasm.state.mnemonic = this.mnemonic;
dasm.state.iclass = this.iclass;
dasm.state.vectorData = this.vec;
for (int i = 0; i < mutators.Length; ++i)
{
if (!mutators[i](wInstr, dasm))
{
return(dasm.CreateInvalidInstruction());
}
}
var instr = dasm.state.MakeInstruction();
return(instr);
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
var rn = Registers.GpRegs[SBitfield(wInstr, 8, 3)];
var registers = (byte)wInstr;
var st = SBitfield(wInstr, 11, 1) == 0;
var w = st || (registers & (1 << rn.Number)) == 0;
return(new AArch32Instruction
{
opcode = st
? Opcode.stm
: Opcode.ldm,
Writeback = w,
ops = new MachineOperand[] {
new RegisterOperand(rn),
new MultiRegisterOperand(Registers.GpRegs, PrimitiveType.Word16, (registers))
}
});
}
public override AArch32Instruction Decode(uint wInstr, T32Disassembler dasm)
{
var rn = Registers.GpRegs[SBitfield(wInstr, 8, 3)];
var registers = (byte)wInstr;
var st = SBitfield(wInstr, 11, 1) == 0;
var w = st || (registers & (1 << rn.Number)) == 0;
return(new T32Instruction
{
Mnemonic = st
? Mnemonic.stm
: Mnemonic.ldm,
InstructionClass = InstrClass.Linear,
Writeback = w,
Operands = new MachineOperand[] {
new RegisterOperand(rn),
new MultiRegisterOperand(Registers.GpRegs, PrimitiveType.Word16, (registers))
}
});
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
Debug.Print("NYI: {0}", message);
return(dasm.NotYetImplemented(message, wInstr));
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
return(dasm.DecodeFormat(wInstr, opcode, iclass, format));
}
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
return(dasm.NotYetImplemented(message, wInstr));
}
public abstract AArch32Instruction Decode(T32Disassembler dasm, uint wInstr);
public override AArch32Instruction Decode(T32Disassembler dasm, uint wInstr)
{
return((predicate(wInstr) ? trueDecoder : falseDecoder).Decode(dasm, wInstr));
}