protected override void DoCommandAction() { FPGA.FPGATypes.AssertBackendType(FPGA.FPGATypes.BackendType.ISE, FPGA.FPGATypes.BackendType.Vivado); // work on default netlist if no netlist container names are specifed List <string> netlistContainerNames = new List <string>(); if (NetlistContainerNames.Count > 0) { netlistContainerNames.AddRange(NetlistContainerNames); } else { netlistContainerNames.Add(NetlistContainerManager.DefaultNetlistContainerName); } switch (FPGA.FPGA.Instance.BackendType) { case FPGA.FPGATypes.BackendType.ISE: GenerateXDL genCmd = new GenerateXDL(); genCmd.DesignName = "design"; genCmd.FileName = FileName; genCmd.IncludeDesignStatement = false; genCmd.IncludeDummyNets = true; genCmd.IncludeModuleFooter = false; genCmd.IncludeModuleHeader = false; genCmd.IncludePorts = false; genCmd.NetlistContainerNames = netlistContainerNames; genCmd.SortInstancesBySliceName = false; CommandExecuter.Instance.Execute(genCmd); break; case FPGA.FPGATypes.BackendType.Vivado: if (netlistContainerNames.Count != 1) { throw new ArgumentNullException(GetType() + " for backend " + FPGA.FPGATypes.BackendType.Vivado + " only supports one netlist container for code generation"); } GenerateTCL saveCmd = new GenerateTCL(); saveCmd.FileName = FileName; saveCmd.NetlistContainerName = netlistContainerNames[0]; saveCmd.IncludeLinkDesignCommand = true; saveCmd.ExcludedProperties.Add("LOCK_PINS"); saveCmd.ExcludedProperties.Add("box_type"); CommandExecuter.Instance.Execute(saveCmd); break; } }
protected override void DoCommandAction() { // read env string xilinxDir = Environment.GetEnvironmentVariable("XILINX"); if (xilinxDir[xilinxDir.Length - 1].Equals(Path.DirectorySeparatorChar)) { xilinxDir += Path.DirectorySeparatorChar; } string tempXDLFile = Path.ChangeExtension(Path.GetTempFileName(), "xdl"); string tempNCDFile = Path.ChangeExtension(Path.GetTempFileName(), "ncd"); string tempSCRFile = Path.ChangeExtension(Path.GetTempFileName(), "scr"); string tempBatchFile = Path.ChangeExtension(Path.GetTempFileName(), "bat"); string tempLogFile = Path.ChangeExtension(Path.GetTempFileName(), "log"); // create xdl // CommandExecuter.Instance.Execute(new GenerateXDL(tempXDLFile, this.MacroNames, this.IncludePorts, this.IncludeDummyNets, true, true, true)); GenerateXDL genXDLCmd = new GenerateXDL(); genXDLCmd.DesignName = "blocker"; genXDLCmd.FileName = tempXDLFile; genXDLCmd.IncludeDesignStatement = true; genXDLCmd.IncludeDummyNets = IncludeDummyNets; genXDLCmd.IncludeDesignStatement = true; genXDLCmd.IncludeModuleHeader = false; genXDLCmd.IncludeModuleFooter = false; genXDLCmd.IncludePorts = IncludePorts; genXDLCmd.NetlistContainerNames = MacroNames; genXDLCmd.SortInstancesBySliceName = false; CommandExecuter.Instance.Execute(genXDLCmd); if (RunFEScript) { // create fe CommandExecuter.Instance.Execute(new GenerateFEScript(tempSCRFile, tempNCDFile, MacroNames)); } // convert xdl2ncd, run fe script and launch fe in from batch file StreamWriter batchFile = new StreamWriter(tempBatchFile); string conversionCmd = "xdl -xdl2ncd \"" + tempXDLFile + "\" \"" + tempNCDFile + "\" -nodrc"; batchFile.WriteLine(conversionCmd); // no need for fe script when including port statements if (RunFEScript) { batchFile.WriteLine("fpga_edline -p \"" + tempSCRFile + "\" >> \"" + tempLogFile + "\""); } if (!string.IsNullOrEmpty(NMCFile)) { batchFile.WriteLine("copy \"" + tempNCDFile + "\" \"" + NMCFile + "\" /Y"); } if (LaunchFE) { batchFile.WriteLine("start fpga_editor \"" + tempNCDFile + "\""); } batchFile.WriteLine("del \"" + tempXDLFile + "\""); batchFile.WriteLine("del \"" + tempSCRFile + "\""); batchFile.WriteLine("del \"" + tempLogFile + "\""); batchFile.Close(); Process.Start(tempBatchFile); }