private void nes_w(byte ChipID, Int32 offset, byte data)
{
nes_state info = NESAPUData[ChipID];
switch (offset & 0xE0)
{
case 0x00: // NES APU
// switch (EMU_CORE)
// {
//# ifdef ENABLE_ALL_CORES
// case EC_MAME:
// nes_psg_w(info->chip_apu, offset, data);
// break;
//#endif
// case EC_NSFPLAY:
// NES_APU handles the sqaure waves, NES_DMC the rest
nes_apu.NES_APU_np_Write(info.chip_apu, (UInt32)(0x4000 | offset), data);
nes_dmc.NES_DMC_np_Write(info.chip_dmc, (UInt32)(0x4000 | offset), data);
// break;
// }
break;
case 0x20: // FDS register
if (info.chip_fds == null)
{
break;
}
if (offset == 0x3F)
{
nes_fds.NES_FDS_Write(info.chip_fds, 0x4023, data);
}
else
{
nes_fds.NES_FDS_Write(info.chip_fds, (UInt32)(0x4080 | (offset & 0x1F)), data);
}
break;
case 0x40: // FDS wave RAM
case 0x60:
if (info.chip_fds == null)
{
break;
}
nes_fds.NES_FDS_Write(info.chip_fds, (UInt32)(0x4000 | offset), data);
break;
}
}
public override bool Write(uint adr, uint val, uint id = 0)
{
return(dmc.NES_DMC_np_Write(chip, adr, val));
}
