public SubtractWithCarry_16bit(Z80Cpu cpu, RegAddrMode16Bit destinationAddressMode, RegAddrMode16Bit sourceAddressMode) { _cpu = cpu; _destinationAddressMode = destinationAddressMode; _sourceAddressMode = sourceAddressMode; _internalCycle = new InternalCycle(7); }
public SetOrResetBit(Z80Cpu cpu, IAddressMode <byte> addressMode, int bitNumber, bool isSet) { _cpu = cpu; _addressMode = addressMode; _bitNumber = bitNumber; _isSet = isSet; }
public static void SetValueOnProcessor(this Register register, Z80Cpu cpu, byte value) { switch (register) { case Register.A: cpu.A = value; break; case Register.B: cpu.B = value; break; case Register.C: cpu.C = value; break; case Register.D: cpu.D = value; break; case Register.E: cpu.E = value; break; case Register.H: cpu.H = value; break; case Register.I: cpu.I = value; break; case Register.L: cpu.L = value; break; case Register.R: cpu.R = value; break; case Register.IXh: cpu.IX = (ushort)((cpu.IX & 0xff) | (value << 8)); break; case Register.IXl: cpu.IX = (ushort)((cpu.IX & 0xff00) | value); break; case Register.IYh: cpu.IY = (ushort)((cpu.IY & 0xff) | (value << 8)); break; case Register.IYl: cpu.IY = (ushort)((cpu.IY & 0xff00) | value); break; default: throw new InvalidOperationException($"Invalid register value: {register}"); } }
public void FullResetWhenCreatingZ80() { // --- Act var z80 = new Z80Cpu(new Z80TestMemoryDevice(), new Z80TestPortDevice()); // --- Assert z80.Registers.AF.ShouldBe((ushort)0); z80.Registers.BC.ShouldBe((ushort)0); z80.Registers.DE.ShouldBe((ushort)0); z80.Registers.HL.ShouldBe((ushort)0); z80.Registers._AF_.ShouldBe((ushort)0); z80.Registers._BC_.ShouldBe((ushort)0); z80.Registers._DE_.ShouldBe((ushort)0); z80.Registers._HL_.ShouldBe((ushort)0); z80.Registers.PC.ShouldBe((ushort)0); z80.Registers.SP.ShouldBe((ushort)0); z80.Registers.IX.ShouldBe((ushort)0); z80.Registers.IY.ShouldBe((ushort)0); z80.Registers.IR.ShouldBe((ushort)0); z80.Registers.WZ.ShouldBe((ushort)0); (z80.StateFlags & Z80StateFlags.Reset).ShouldBe(Z80StateFlags.None); (z80.StateFlags & Z80StateFlags.Int).ShouldBe(Z80StateFlags.None); z80.IsInterruptBlocked.ShouldBeFalse(); (z80.StateFlags & Z80StateFlags.Nmi).ShouldBe(Z80StateFlags.None); z80.InterruptMode.ShouldBe((byte)0); z80.PrefixMode.ShouldBe(Z80Cpu.OpPrefixMode.None); z80.IndexMode.ShouldBe(Z80Cpu.OpIndexMode.None); z80.Tacts.ShouldBe(0L); }
public static void SetValueOnProcessor(this WideRegister register, Z80Cpu cpu, ushort value) { switch (register) { case WideRegister.AF: cpu.A = (byte)((value & 0xff00) >> 8); cpu.Flags = (Z80Flags)(value & 0xff); break; case WideRegister.BC: cpu.B = (byte)((value & 0xff00) >> 8); cpu.C = (byte)(value & 0xff); break; case WideRegister.DE: cpu.D = (byte)((value & 0xff00) >> 8); cpu.E = (byte)(value & 0xff); break; case WideRegister.HL: cpu.H = (byte)((value & 0xff00) >> 8); cpu.L = (byte)(value & 0xff); break; case WideRegister.SP: cpu.SP = value; break; case WideRegister.IX: cpu.IX = value; break; case WideRegister.IY: cpu.IY = value; break; case WideRegister.AF_: cpu.AF_ = value; break; case WideRegister.BC_: cpu.BC_ = value; break; case WideRegister.DE_: cpu.DE_ = value; break; case WideRegister.HL_: cpu.HL_ = value; break; case WideRegister.PC: cpu.PC = value; break; default: throw new InvalidOperationException($"Invalid register value: {register}"); } }
public InstructionForm(Z80Cpu cpu, Memory.MappedMemory ram) { m_cpu = cpu; m_ram = ram; //m_curInst = null; InitializeComponent(); }
internal static Z80CpuSnapshot FromCpu(Z80Cpu cpu) { lock (cpu.CpuStateLock) { return(new Z80CpuSnapshot { A = cpu.A, Flags = cpu.Flags, B = cpu.B, C = cpu.C, D = cpu.D, E = cpu.E, H = cpu.H, L = cpu.L, I = cpu.I, R = cpu.R, IX = cpu.IX, IY = cpu.IY, PC = cpu.PC, SP = cpu.SP, AF_ = cpu.AF_, BC_ = cpu.BC_, DE_ = cpu.DE_, HL_ = cpu.HL_, NewInstruction = cpu.NewInstruction }); } }
public RotateDigit(Z80Cpu cpu, bool isLeftShift) { _cpu = cpu; _addressMode = new RegIndirect(_cpu, WideRegister.HL); _internalCycle = new InternalCycle(4); _isLeftShift = isLeftShift; }
public MemoryShortReader(Z80Cpu cpu, ushort?address = null) { _byte1Reader = new MemReadCycle(cpu); _byte1Reader.Address = address; _byte2Reader = new MemReadCycle(cpu); _byte2Reader.Address = (address == null ? (ushort?)null : (ushort)(address + 1)); }
public RotateShiftBase(Z80Cpu cpu, IAddressMode <byte> addressMode, bool circular = false, bool is8080Compatible = false) { _cpu = cpu; _addressMode = addressMode; _circular = circular; _is8080Compatible = is8080Compatible; }
public CALL(Z80Cpu cpu, IAddressMode <ushort> addressMode, JumpCondition jumpCondition) { _cpu = cpu; _addressMode = addressMode; _internalCycle = new InternalCycle(1); _jumpCondition = jumpCondition; }
// private static bool m_debugContextInitalized = false; public GameBoy() { m_parameters = new CParameters(); LoadParameters(); m_DebugThread = new System.Threading.Thread(DebuggerThread); m_DebugThread.Start(); // m_debugContextInitalized = false; m_timer = new GameBoyTest.MicroTimer.MicroTimer(); m_BGScreen = new GBScreenForm(GameBoy.Ram); m_memory = new MappedMemory(); m_cartridge = new Cartridge(); m_sbDebug = new SB_Debug(); m_inputsMgr = new InputsMgr(); m_video = new GBVideo(m_BGScreen); m_soundManager = new SoundManager(); m_cpu = new Z80Cpu(m_timer); m_bDebuggerEnabled = false; m_cpu.Init(); m_video.Init(); m_sbDebug.Init(); //sDebugReady = false; //m_cpu.Start(); m_video.Start(); Application.Run(); System.Windows.Forms.Application.Exit(); }
public SubtractOrCompare(Z80Cpu cpu, IAddressMode <byte> addressMode, bool withCarry = false, bool updateAccumulator = true) { _cpu = cpu; _addressMode = addressMode; _withCarry = withCarry; _updateAccumulator = updateAccumulator; }
public IN(Z80Cpu cpu, Register destination, IReadAddressedOperand <byte> source, Register topHalfOfAddressSource) { _cpu = cpu; _destination = destination; _source = source; _inputCycle = new InputCycle(cpu); _topHalfOfAddressSource = topHalfOfAddressSource; }
public OUT(Z80Cpu cpu, IReadAddressedOperand <byte> destination, Register source, Register topHalfOfAddressSource) { _cpu = cpu; _destination = destination; _source = source; _outputCycle = new OutputCycle(cpu); _topHalfOfAddressSource = topHalfOfAddressSource; }
public Add_16bit(Z80Cpu cpu, RegAddrMode16Bit destinationAddressMode, RegAddrMode16Bit sourceAddressMode, bool withCarry = false) { _cpu = cpu; _destinationAddressMode = destinationAddressMode; _sourceAddressMode = sourceAddressMode; _withCarry = withCarry; _internalCycle = new InternalCycle(7); }
private Z80Cpu CreateZ80Cpu() { var z80 = new Z80Cpu(new Z80TestMemoryDevice(), new Z80TestPortDevice()) { StackDebugSupport = new DefaultStackDebugSupport() }; return(z80); }
public LD_Generic(Z80Cpu cpu, IAddressMode <T> destination, IAddressMode <T> source, int additionalM1TCycles, bool setsFlags = false) { _cpu = cpu; _additionalM1TCycles = additionalM1TCycles; _remainingM1Cycles = additionalM1TCycles; _destinationAddressMode = destination; _sourceAddressMode = source; _setsFlags = setsFlags; }
public CpuDebug(Ti8xCalculator master) { InitializeComponent(); Master = master; Cpu = Master.Calculator.Cpu; RefreshRegisters(); //Master.Calculator.ExecutionFinished += Calculator_ExecutionFinished; Master.UpdateData += Calculator_ExecutionFinished; }
public MemoryShortWriter(Z80Cpu cpu, ushort address, bool decreasingAddress) { _decreasingAddress = decreasingAddress; _byte1Writer = new MemWriteCycle(cpu); _byte1Writer.Address = _decreasingAddress ? --address : address++; _byte2Writer = new MemWriteCycle(cpu); _byte2Writer.Address = _decreasingAddress ? --address : address; }
public OUTxx(Z80Cpu cpu, bool increment, bool repeats) { _cpu = cpu; _outputCycle = new OutputCycle(cpu); _sourceReader = new RegIndirect(cpu, WideRegister.HL).Reader; _repeatCycles = new InternalCycle(5); _remainingM1Cycles = 1; _increment = increment; _repeats = repeats; }
public INxx(Z80Cpu cpu, bool increment, bool repeats) { _cpu = cpu; _inputCycle = new InputCycle(cpu); _destination = new RegIndirect(cpu, WideRegister.HL); _repeatCycles = new InternalCycle(5); _remainingM1Cycles = 1; _increment = increment; _repeats = repeats; }
public void RSTSignalIsProcessed() { // --- Arrange var z80 = new Z80Cpu(new Z80TestMemoryDevice(), new Z80TestPortDevice()); z80.Registers.AF = 0x0001; z80.Registers.BC = 0x2345; z80.Registers.DE = 0x3456; z80.Registers.HL = 0x4567; z80.Registers.SP = 0x5678; z80.Registers.PC = 0x6789; z80.Registers.IR = 0x789A; z80.Registers.IX = 0x89AB; z80.Registers.IY = 0x9ABC; z80.Registers._AF_ = 0x9876; z80.Registers._BC_ = 0x8765; z80.Registers._DE_ = 0x7654; z80.Registers._HL_ = 0x6543; z80.BlockInterrupt(); z80.IFF1 = true; z80.IFF2 = true; z80.PrefixMode = Z80Cpu.OpPrefixMode.Bit; z80.IndexMode = Z80Cpu.OpIndexMode.IY; z80.SetInterruptMode(2); z80.SetTacts(1000); // --- Act z80.StateFlags = Z80StateFlags.Reset; z80.ExecuteCpuCycle(); // --- Assert z80.Registers.AF.ShouldBe((ushort)0x0001); z80.Registers.BC.ShouldBe((ushort)0x2345); z80.Registers.DE.ShouldBe((ushort)0x3456); z80.Registers.HL.ShouldBe((ushort)0x4567); z80.Registers.SP.ShouldBe((ushort)0x5678); z80.Registers.PC.ShouldBe((ushort)0); z80.Registers.IR.ShouldBe((ushort)0); z80.Registers.IX.ShouldBe((ushort)0x89AB); z80.Registers.IY.ShouldBe((ushort)0x9ABC); z80.Registers._AF_.ShouldBe((ushort)0x9876); z80.Registers._BC_.ShouldBe((ushort)0x8765); z80.Registers._DE_.ShouldBe((ushort)0x7654); z80.Registers._HL_.ShouldBe((ushort)0x6543); z80.IsInterruptBlocked.ShouldBeFalse(); z80.IFF1.ShouldBeFalse(); z80.IFF2.ShouldBeFalse(); z80.PrefixMode.ShouldBe(Z80Cpu.OpPrefixMode.None); z80.IndexMode.ShouldBe(Z80Cpu.OpIndexMode.None); z80.InterruptMode.ShouldBe((byte)0); z80.Tacts.ShouldBe(0); (z80.StateFlags & Z80StateFlags.Reset).ShouldBe(Z80StateFlags.None); }
public Jump(Z80Cpu cpu, IAddressMode <ushort> addressMode, JumpCondition condition, bool requiresConditionalInternalCycle = false, int additionalM1TCycles = 0, string mnemomic = "JP") { _cpu = cpu; _addressMode = addressMode; _condition = condition; _requiresConditionalInternalCycle = requiresConditionalInternalCycle; _internalCycle = new InternalCycle(5); _additionalM1TCycles = additionalM1TCycles; _remainingM1Cycles = additionalM1TCycles; Mnemonic = mnemomic; }
public ExecutionHistory(Ti8xCalculator master) { InitializeComponent(); Master = master; Cpu = Master.Calculator.Cpu; //Master.Calculator.ExecutionFinished += Calculator_ExecutionFinished; Master.UpdateData += Calculator_ExecutionFinished; instrCountUpDown.Minimum = 1; instrCountUpDown.Maximum = Z80Cpu.LastExecSize; RefreshData(); }
public Quartz32768HzCrystal(Calculator master) { Master = master; Cpu = master.Cpu; Scheduler = Master.Scheduler; NextIncrement = new Scheduler.WallTimeEvent(); NextIncrement.Tag = "32768 Hz Crystal Tick"; NextIncrement.Handler = new EventHandler <Scheduler.WallTimeEvent>(DoTick); Scheduler.EnqueueRelativeEvent(NextIncrement, 1.0 / 32768); }
public static void SetOrReset(this Z80Flags flag, Z80Cpu cpu, bool value) { if (value) { cpu.Flags |= flag; } else { cpu.Flags &= ~flag; } }
public Indexed(Z80Cpu cpu, WideRegister register, int internalCycleLength = 5, bool additionalCycleOnRead = false) { if (register != WideRegister.IX && register != WideRegister.IY) { throw new InvalidOperationException("Invald index register specified"); } _register = register; _cpu = cpu; _offsetReadCycle = new MemReadCycle(cpu); _internalCycle = new InternalCycle(internalCycleLength); _additionalCycleOnRead = additionalCycleOnRead; }
public void MaskableInterruptModeIsReached() { // --- Arrange var z80 = new Z80Cpu(new Z80SimpleMemoryDevice(), new Z80TestPortDevice()); z80.IFF1 = z80.IFF2 = true; z80.Registers.SP = 0x100; // --- Act z80.StateFlags |= Z80StateFlags.Int; z80.ExecuteCpuCycle(); // --- Assert z80.MaskableInterruptModeEntered.ShouldBeTrue(); }
public static byte GetValue(this Register register, Z80Cpu cpu) { switch (register) { case Register.A: return(cpu.A); case Register.B: return(cpu.B); case Register.C: return(cpu.C); case Register.D: return(cpu.D); case Register.E: return(cpu.E); case Register.H: return(cpu.H); case Register.I: return(cpu.I); case Register.L: return(cpu.L); case Register.R: return(cpu.R); case Register.IXh: return((byte)(cpu.IX >> 8)); case Register.IXl: return((byte)(cpu.IX & 0xff)); case Register.IYh: return((byte)(cpu.IY >> 8)); case Register.IYl: return((byte)(cpu.IY & 0xff)); default: throw new InvalidOperationException($"Invalid register value: {register}"); } }