public void Poke(ushort address, byte value)
{
// Regular RAM
if (address < 0xFC00)
{
Ram.Poke(address, value);
return;
}
// "These overlays are controlled by the bits in the hardware register at FFF9."
if (address == 0xFFF9) // Special case for memory map control register
{
ConfigureMemoryMapControl(value);
return;
}
// "FFFE, FFFF CPU Interrupt Vector (RAM or ROM)
// FFFC, FFFD CPU Reset Vector (RAM or ROM)
// FFFA, FFFB CPU NMI Vector (RAM or ROM)"
if (address > 0xFFFA)
{
VectorSpace.Poke(address, value); return;
}
// "FE00 thru FFF7 ROM Space"
if (address >= 0xFE00)
{
RomSpace.Poke(address, value); return;
}
// "FD00 thru FDFF Mikey Space"
if (address >= 0xFD00)
{
MikeySpace.Poke(address, value); return;
}
// "FC00 thru FCFF Suzy Space"
if (address >= 0xFC00)
{
SuzySpace.Poke(address, value); return;
}
}
public byte Peek(ushort address)
{
// Regular RAM
if (address < 0xFC00)
{
return(Ram.Peek(address));
//return directAccessRam[address];
}
// "These overlays are controlled by the bits in the hardware register at FFF9."
if (address == 0xFFF9) // Special case for memory map control register
{
// "Both Mikey and Suzy accept a write at those addresses but only Mikey responds to a read."
// Since we will be passing regular RAM memory to Suzy, it is OK to always return value
// because only Mikey will be going through this MMU.
return(MAPCTL.ByteData);
}
// For details on address ranges see Poke() implementation
if (address >= 0xFFFA)
{
return(VectorSpace.Peek(address));
}
if (address >= 0xFE00)
{
return(RomSpace.Peek(address));
}
if (address >= 0xFD00)
{
return(MikeySpace.Peek(address));
}
if (address >= 0xFC00)
{
return(SuzySpace.Peek(address));
}
return(0);
}
