public void SetFlagsForPrefixedOpcode(PrefixedOpcode opcode, byte initialValue, byte newValue)
{
AffectedFlags affectedFlags;
affectedFlags = opcodeFlags.GetAffectedFlagsByPrefixedOpcode(opcode);
UpdateFlags(affectedFlags, initialValue, newValue);
}
public AffectedFlags GetAffectedFlagsByPrefixedOpcode(PrefixedOpcode opcode)
{
return(prefixedOpcodeAffectedFlags[opcode]);
}
private int ProcessPrefixedOpcode(PrefixedOpcode opcode)
{
switch (opcode)
{
case PrefixedOpcode.RLC_B: RotateLeftWithCarry(Register8Bit.B); break;
case PrefixedOpcode.RLC_C: RotateLeftWithCarry(Register8Bit.C); break;
case PrefixedOpcode.RLC_D: RotateLeftWithCarry(Register8Bit.D); break;
case PrefixedOpcode.RLC_E: RotateLeftWithCarry(Register8Bit.E); break;
case PrefixedOpcode.RLC_H: RotateLeftWithCarry(Register8Bit.H); break;
case PrefixedOpcode.RLC_L: RotateLeftWithCarry(Register8Bit.L); break;
case PrefixedOpcode.RLC_mHL: RotateLeftWithCarry(registers.HL); break;
case PrefixedOpcode.RLC_A: RotateLeftWithCarry(Register8Bit.A); break;
case PrefixedOpcode.RRC_B: RotateRightWithCarry(Register8Bit.B); break;
case PrefixedOpcode.RRC_C: RotateRightWithCarry(Register8Bit.C); break;
case PrefixedOpcode.RRC_D: RotateRightWithCarry(Register8Bit.D); break;
case PrefixedOpcode.RRC_E: RotateRightWithCarry(Register8Bit.E); break;
case PrefixedOpcode.RRC_H: RotateRightWithCarry(Register8Bit.H); break;
case PrefixedOpcode.RRC_L: RotateRightWithCarry(Register8Bit.L); break;
case PrefixedOpcode.RRC_mHL: RotateRightWithCarry(registers.HL); break;
case PrefixedOpcode.RRC_A: RotateRightWithCarry(Register8Bit.A); break;
case PrefixedOpcode.RL_B: RotateLeft(Register8Bit.B); break;
case PrefixedOpcode.RL_C: RotateLeft(Register8Bit.C); break;
case PrefixedOpcode.RL_D: RotateLeft(Register8Bit.D); break;
case PrefixedOpcode.RL_E: RotateLeft(Register8Bit.E); break;
case PrefixedOpcode.RL_H: RotateLeft(Register8Bit.H); break;
case PrefixedOpcode.RL_L: RotateLeft(Register8Bit.L); break;
case PrefixedOpcode.RL_mHL: RotateLeft(registers.HL); break;
case PrefixedOpcode.RL_A: RotateLeft(Register8Bit.A); break;
case PrefixedOpcode.RR_B: RotateRight(Register8Bit.B); break;
case PrefixedOpcode.RR_C: RotateRight(Register8Bit.C); break;
case PrefixedOpcode.RR_D: RotateRight(Register8Bit.D); break;
case PrefixedOpcode.RR_E: RotateRight(Register8Bit.E); break;
case PrefixedOpcode.RR_H: RotateRight(Register8Bit.H); break;
case PrefixedOpcode.RR_L: RotateRight(Register8Bit.L); break;
case PrefixedOpcode.RR_mHL: RotateRight(registers.HL); break;
case PrefixedOpcode.RR_A: RotateRight(Register8Bit.A); break;
case PrefixedOpcode.SLA_B: ShiftLeftArithmetic(Register8Bit.B); break;
case PrefixedOpcode.SLA_C: ShiftLeftArithmetic(Register8Bit.C); break;
case PrefixedOpcode.SLA_D: ShiftLeftArithmetic(Register8Bit.D); break;
case PrefixedOpcode.SLA_E: ShiftLeftArithmetic(Register8Bit.E); break;
case PrefixedOpcode.SLA_H: ShiftLeftArithmetic(Register8Bit.H); break;
case PrefixedOpcode.SLA_L: ShiftLeftArithmetic(Register8Bit.L); break;
case PrefixedOpcode.SLA_mHL: ShiftLeftArithmetic(registers.HL); break;
case PrefixedOpcode.SLA_A: ShiftLeftArithmetic(Register8Bit.A); break;
case PrefixedOpcode.SRA_B: ShiftRightArithmetic(Register8Bit.B); break;
case PrefixedOpcode.SRA_C: ShiftRightArithmetic(Register8Bit.C); break;
case PrefixedOpcode.SRA_D: ShiftRightArithmetic(Register8Bit.D); break;
case PrefixedOpcode.SRA_E: ShiftRightArithmetic(Register8Bit.E); break;
case PrefixedOpcode.SRA_H: ShiftRightArithmetic(Register8Bit.H); break;
case PrefixedOpcode.SRA_L: ShiftRightArithmetic(Register8Bit.L); break;
case PrefixedOpcode.SRA_mHL: ShiftRightArithmetic(registers.HL); break;
case PrefixedOpcode.SRA_A: ShiftRightArithmetic(Register8Bit.A); break;
case PrefixedOpcode.SWAP_B: Swap(Register8Bit.B); break;
case PrefixedOpcode.SWAP_C: Swap(Register8Bit.C); break;
case PrefixedOpcode.SWAP_D: Swap(Register8Bit.D); break;
case PrefixedOpcode.SWAP_E: Swap(Register8Bit.E); break;
case PrefixedOpcode.SWAP_H: Swap(Register8Bit.H); break;
case PrefixedOpcode.SWAP_L: Swap(Register8Bit.L); break;
case PrefixedOpcode.SWAP_mHL: Swap(registers.HL); break;
case PrefixedOpcode.SWAP_A: Swap(Register8Bit.A); break;
case PrefixedOpcode.SRL_B: ShiftRightLogical(Register8Bit.B); break;
case PrefixedOpcode.SRL_C: ShiftRightLogical(Register8Bit.C); break;
case PrefixedOpcode.SRL_D: ShiftRightLogical(Register8Bit.D); break;
case PrefixedOpcode.SRL_E: ShiftRightLogical(Register8Bit.E); break;
case PrefixedOpcode.SRL_H: ShiftRightLogical(Register8Bit.H); break;
case PrefixedOpcode.SRL_L: ShiftRightLogical(Register8Bit.L); break;
case PrefixedOpcode.SRL_mHL: ShiftRightLogical(registers.HL); break;
case PrefixedOpcode.SRL_A: ShiftRightLogical(Register8Bit.A); break;
case PrefixedOpcode.BIT_0_B: BitTest(Register8Bit.B, 0); break;
case PrefixedOpcode.BIT_0_C: BitTest(Register8Bit.C, 0); break;
case PrefixedOpcode.BIT_0_D: BitTest(Register8Bit.D, 0); break;
case PrefixedOpcode.BIT_0_E: BitTest(Register8Bit.E, 0); break;
case PrefixedOpcode.BIT_0_H: BitTest(Register8Bit.H, 0); break;
case PrefixedOpcode.BIT_0_L: BitTest(Register8Bit.L, 0); break;
case PrefixedOpcode.BIT_0_mHL: BitTest(registers.HL, 0); break;
case PrefixedOpcode.BIT_0_A: BitTest(Register8Bit.A, 0); break;
case PrefixedOpcode.BIT_1_B: BitTest(Register8Bit.B, 1); break;
case PrefixedOpcode.BIT_1_C: BitTest(Register8Bit.C, 1); break;
case PrefixedOpcode.BIT_1_D: BitTest(Register8Bit.D, 1); break;
case PrefixedOpcode.BIT_1_E: BitTest(Register8Bit.E, 1); break;
case PrefixedOpcode.BIT_1_H: BitTest(Register8Bit.H, 1); break;
case PrefixedOpcode.BIT_1_L: BitTest(Register8Bit.L, 1); break;
case PrefixedOpcode.BIT_1_mHL: BitTest(registers.HL, 1); break;
case PrefixedOpcode.BIT_1_A: BitTest(Register8Bit.A, 1); break;
case PrefixedOpcode.BIT_2_B: BitTest(Register8Bit.B, 2); break;
case PrefixedOpcode.BIT_2_C: BitTest(Register8Bit.C, 2); break;
case PrefixedOpcode.BIT_2_D: BitTest(Register8Bit.D, 2); break;
case PrefixedOpcode.BIT_2_E: BitTest(Register8Bit.E, 2); break;
case PrefixedOpcode.BIT_2_H: BitTest(Register8Bit.H, 2); break;
case PrefixedOpcode.BIT_2_L: BitTest(Register8Bit.L, 2); break;
case PrefixedOpcode.BIT_2_mHL: BitTest(registers.HL, 2); break;
case PrefixedOpcode.BIT_2_A: BitTest(Register8Bit.A, 2); break;
case PrefixedOpcode.BIT_3_B: BitTest(Register8Bit.B, 3); break;
case PrefixedOpcode.BIT_3_C: BitTest(Register8Bit.C, 3); break;
case PrefixedOpcode.BIT_3_D: BitTest(Register8Bit.D, 3); break;
case PrefixedOpcode.BIT_3_E: BitTest(Register8Bit.E, 3); break;
case PrefixedOpcode.BIT_3_H: BitTest(Register8Bit.H, 3); break;
case PrefixedOpcode.BIT_3_L: BitTest(Register8Bit.L, 3); break;
case PrefixedOpcode.BIT_3_mHL: BitTest(registers.HL, 3); break;
case PrefixedOpcode.BIT_3_A: BitTest(Register8Bit.A, 3); break;
case PrefixedOpcode.BIT_4_B: BitTest(Register8Bit.B, 4); break;
case PrefixedOpcode.BIT_4_C: BitTest(Register8Bit.C, 4); break;
case PrefixedOpcode.BIT_4_D: BitTest(Register8Bit.D, 4); break;
case PrefixedOpcode.BIT_4_E: BitTest(Register8Bit.E, 4); break;
case PrefixedOpcode.BIT_4_H: BitTest(Register8Bit.H, 4); break;
case PrefixedOpcode.BIT_4_L: BitTest(Register8Bit.L, 4); break;
case PrefixedOpcode.BIT_4_mHL: BitTest(registers.HL, 4); break;
case PrefixedOpcode.BIT_4_A: BitTest(Register8Bit.A, 4); break;
case PrefixedOpcode.BIT_5_B: BitTest(Register8Bit.B, 5); break;
case PrefixedOpcode.BIT_5_C: BitTest(Register8Bit.C, 5); break;
case PrefixedOpcode.BIT_5_D: BitTest(Register8Bit.D, 5); break;
case PrefixedOpcode.BIT_5_E: BitTest(Register8Bit.E, 5); break;
case PrefixedOpcode.BIT_5_H: BitTest(Register8Bit.H, 5); break;
case PrefixedOpcode.BIT_5_L: BitTest(Register8Bit.L, 5); break;
case PrefixedOpcode.BIT_5_mHL: BitTest(registers.HL, 5); break;
case PrefixedOpcode.BIT_5_A: BitTest(Register8Bit.A, 5); break;
case PrefixedOpcode.BIT_6_B: BitTest(Register8Bit.B, 6); break;
case PrefixedOpcode.BIT_6_C: BitTest(Register8Bit.C, 6); break;
case PrefixedOpcode.BIT_6_D: BitTest(Register8Bit.D, 6); break;
case PrefixedOpcode.BIT_6_E: BitTest(Register8Bit.E, 6); break;
case PrefixedOpcode.BIT_6_H: BitTest(Register8Bit.H, 6); break;
case PrefixedOpcode.BIT_6_L: BitTest(Register8Bit.L, 6); break;
case PrefixedOpcode.BIT_6_mHL: BitTest(registers.HL, 6); break;
case PrefixedOpcode.BIT_6_A: BitTest(Register8Bit.A, 6); break;
case PrefixedOpcode.BIT_7_B: BitTest(Register8Bit.B, 7); break;
case PrefixedOpcode.BIT_7_C: BitTest(Register8Bit.C, 7); break;
case PrefixedOpcode.BIT_7_D: BitTest(Register8Bit.D, 7); break;
case PrefixedOpcode.BIT_7_E: BitTest(Register8Bit.E, 7); break;
case PrefixedOpcode.BIT_7_H: BitTest(Register8Bit.H, 7); break;
case PrefixedOpcode.BIT_7_L: BitTest(Register8Bit.L, 7); break;
case PrefixedOpcode.BIT_7_mHL: BitTest(registers.HL, 7); break;
case PrefixedOpcode.BIT_7_A: BitTest(Register8Bit.A, 7); break;
case PrefixedOpcode.RES_0_B: ResetBit(Register8Bit.B, 0); break;
case PrefixedOpcode.RES_0_C: ResetBit(Register8Bit.C, 0); break;
case PrefixedOpcode.RES_0_D: ResetBit(Register8Bit.D, 0); break;
case PrefixedOpcode.RES_0_E: ResetBit(Register8Bit.E, 0); break;
case PrefixedOpcode.RES_0_H: ResetBit(Register8Bit.H, 0); break;
case PrefixedOpcode.RES_0_L: ResetBit(Register8Bit.L, 0); break;
case PrefixedOpcode.RES_0_mHL: ResetBit(registers.HL, 0); break;
case PrefixedOpcode.RES_0_A: ResetBit(Register8Bit.A, 0); break;
case PrefixedOpcode.RES_1_B: ResetBit(Register8Bit.B, 1); break;
case PrefixedOpcode.RES_1_C: ResetBit(Register8Bit.C, 1); break;
case PrefixedOpcode.RES_1_D: ResetBit(Register8Bit.D, 1); break;
case PrefixedOpcode.RES_1_E: ResetBit(Register8Bit.E, 1); break;
case PrefixedOpcode.RES_1_H: ResetBit(Register8Bit.H, 1); break;
case PrefixedOpcode.RES_1_L: ResetBit(Register8Bit.L, 1); break;
case PrefixedOpcode.RES_1_mHL: ResetBit(registers.HL, 1); break;
case PrefixedOpcode.RES_1_A: ResetBit(Register8Bit.A, 1); break;
case PrefixedOpcode.RES_2_B: ResetBit(Register8Bit.B, 2); break;
case PrefixedOpcode.RES_2_C: ResetBit(Register8Bit.C, 2); break;
case PrefixedOpcode.RES_2_D: ResetBit(Register8Bit.D, 2); break;
case PrefixedOpcode.RES_2_E: ResetBit(Register8Bit.E, 2); break;
case PrefixedOpcode.RES_2_H: ResetBit(Register8Bit.H, 2); break;
case PrefixedOpcode.RES_2_L: ResetBit(Register8Bit.L, 2); break;
case PrefixedOpcode.RES_2_mHL: ResetBit(registers.HL, 2); break;
case PrefixedOpcode.RES_2_A: ResetBit(Register8Bit.A, 2); break;
case PrefixedOpcode.RES_3_B: ResetBit(Register8Bit.B, 3); break;
case PrefixedOpcode.RES_3_C: ResetBit(Register8Bit.C, 3); break;
case PrefixedOpcode.RES_3_D: ResetBit(Register8Bit.D, 3); break;
case PrefixedOpcode.RES_3_E: ResetBit(Register8Bit.E, 3); break;
case PrefixedOpcode.RES_3_H: ResetBit(Register8Bit.H, 3); break;
case PrefixedOpcode.RES_3_L: ResetBit(Register8Bit.L, 3); break;
case PrefixedOpcode.RES_3_mHL: ResetBit(registers.HL, 3); break;
case PrefixedOpcode.RES_3_A: ResetBit(Register8Bit.A, 3); break;
case PrefixedOpcode.RES_4_B: ResetBit(Register8Bit.B, 4); break;
case PrefixedOpcode.RES_4_C: ResetBit(Register8Bit.C, 4); break;
case PrefixedOpcode.RES_4_D: ResetBit(Register8Bit.D, 4); break;
case PrefixedOpcode.RES_4_E: ResetBit(Register8Bit.E, 4); break;
case PrefixedOpcode.RES_4_H: ResetBit(Register8Bit.H, 4); break;
case PrefixedOpcode.RES_4_L: ResetBit(Register8Bit.L, 4); break;
case PrefixedOpcode.RES_4_mHL: ResetBit(registers.HL, 4); break;
case PrefixedOpcode.RES_4_A: ResetBit(Register8Bit.A, 4); break;
case PrefixedOpcode.RES_5_B: ResetBit(Register8Bit.B, 5); break;
case PrefixedOpcode.RES_5_C: ResetBit(Register8Bit.C, 5); break;
case PrefixedOpcode.RES_5_D: ResetBit(Register8Bit.D, 5); break;
case PrefixedOpcode.RES_5_E: ResetBit(Register8Bit.E, 5); break;
case PrefixedOpcode.RES_5_H: ResetBit(Register8Bit.H, 5); break;
case PrefixedOpcode.RES_5_L: ResetBit(Register8Bit.L, 5); break;
case PrefixedOpcode.RES_5_mHL: ResetBit(registers.HL, 5); break;
case PrefixedOpcode.RES_5_A: ResetBit(Register8Bit.A, 5); break;
case PrefixedOpcode.RES_6_B: ResetBit(Register8Bit.B, 6); break;
case PrefixedOpcode.RES_6_C: ResetBit(Register8Bit.C, 6); break;
case PrefixedOpcode.RES_6_D: ResetBit(Register8Bit.D, 6); break;
case PrefixedOpcode.RES_6_E: ResetBit(Register8Bit.E, 6); break;
case PrefixedOpcode.RES_6_H: ResetBit(Register8Bit.H, 6); break;
case PrefixedOpcode.RES_6_L: ResetBit(Register8Bit.L, 6); break;
case PrefixedOpcode.RES_6_mHL: ResetBit(registers.HL, 6); break;
case PrefixedOpcode.RES_6_A: ResetBit(Register8Bit.A, 6); break;
case PrefixedOpcode.RES_7_B: ResetBit(Register8Bit.B, 7); break;
case PrefixedOpcode.RES_7_C: ResetBit(Register8Bit.C, 7); break;
case PrefixedOpcode.RES_7_D: ResetBit(Register8Bit.D, 7); break;
case PrefixedOpcode.RES_7_E: ResetBit(Register8Bit.E, 7); break;
case PrefixedOpcode.RES_7_H: ResetBit(Register8Bit.H, 7); break;
case PrefixedOpcode.RES_7_L: ResetBit(Register8Bit.L, 7); break;
case PrefixedOpcode.RES_7_mHL: ResetBit(registers.HL, 7); break;
case PrefixedOpcode.RES_7_A: ResetBit(Register8Bit.A, 7); break;
case PrefixedOpcode.SET_0_B: SetBit(Register8Bit.B, 0); break;
case PrefixedOpcode.SET_0_C: SetBit(Register8Bit.C, 0); break;
case PrefixedOpcode.SET_0_D: SetBit(Register8Bit.D, 0); break;
case PrefixedOpcode.SET_0_E: SetBit(Register8Bit.E, 0); break;
case PrefixedOpcode.SET_0_H: SetBit(Register8Bit.H, 0); break;
case PrefixedOpcode.SET_0_L: SetBit(Register8Bit.L, 0); break;
case PrefixedOpcode.SET_0_mHL: SetBit(registers.HL, 0); break;
case PrefixedOpcode.SET_0_A: SetBit(Register8Bit.A, 0); break;
case PrefixedOpcode.SET_1_B: SetBit(Register8Bit.B, 1); break;
case PrefixedOpcode.SET_1_C: SetBit(Register8Bit.C, 1); break;
case PrefixedOpcode.SET_1_D: SetBit(Register8Bit.D, 1); break;
case PrefixedOpcode.SET_1_E: SetBit(Register8Bit.E, 1); break;
case PrefixedOpcode.SET_1_H: SetBit(Register8Bit.H, 1); break;
case PrefixedOpcode.SET_1_L: SetBit(Register8Bit.L, 1); break;
case PrefixedOpcode.SET_1_mHL: SetBit(registers.HL, 1); break;
case PrefixedOpcode.SET_1_A: SetBit(Register8Bit.A, 1); break;
case PrefixedOpcode.SET_2_B: SetBit(Register8Bit.B, 2); break;
case PrefixedOpcode.SET_2_C: SetBit(Register8Bit.C, 2); break;
case PrefixedOpcode.SET_2_D: SetBit(Register8Bit.D, 2); break;
case PrefixedOpcode.SET_2_E: SetBit(Register8Bit.E, 2); break;
case PrefixedOpcode.SET_2_H: SetBit(Register8Bit.H, 2); break;
case PrefixedOpcode.SET_2_L: SetBit(Register8Bit.L, 2); break;
case PrefixedOpcode.SET_2_mHL: SetBit(registers.HL, 2); break;
case PrefixedOpcode.SET_2_A: SetBit(Register8Bit.A, 2); break;
case PrefixedOpcode.SET_3_B: SetBit(Register8Bit.B, 3); break;
case PrefixedOpcode.SET_3_C: SetBit(Register8Bit.C, 3); break;
case PrefixedOpcode.SET_3_D: SetBit(Register8Bit.D, 3); break;
case PrefixedOpcode.SET_3_E: SetBit(Register8Bit.E, 3); break;
case PrefixedOpcode.SET_3_H: SetBit(Register8Bit.H, 3); break;
case PrefixedOpcode.SET_3_L: SetBit(Register8Bit.L, 3); break;
case PrefixedOpcode.SET_3_mHL: SetBit(registers.HL, 3); break;
case PrefixedOpcode.SET_3_A: SetBit(Register8Bit.A, 3); break;
case PrefixedOpcode.SET_4_B: SetBit(Register8Bit.B, 4); break;
case PrefixedOpcode.SET_4_C: SetBit(Register8Bit.C, 4); break;
case PrefixedOpcode.SET_4_D: SetBit(Register8Bit.D, 4); break;
case PrefixedOpcode.SET_4_E: SetBit(Register8Bit.E, 4); break;
case PrefixedOpcode.SET_4_H: SetBit(Register8Bit.H, 4); break;
case PrefixedOpcode.SET_4_L: SetBit(Register8Bit.L, 4); break;
case PrefixedOpcode.SET_4_mHL: SetBit(registers.HL, 4); break;
case PrefixedOpcode.SET_4_A: SetBit(Register8Bit.A, 4); break;
case PrefixedOpcode.SET_5_B: SetBit(Register8Bit.B, 5); break;
case PrefixedOpcode.SET_5_C: SetBit(Register8Bit.C, 5); break;
case PrefixedOpcode.SET_5_D: SetBit(Register8Bit.D, 5); break;
case PrefixedOpcode.SET_5_E: SetBit(Register8Bit.E, 5); break;
case PrefixedOpcode.SET_5_H: SetBit(Register8Bit.H, 5); break;
case PrefixedOpcode.SET_5_L: SetBit(Register8Bit.L, 5); break;
case PrefixedOpcode.SET_5_mHL: SetBit(registers.HL, 5); break;
case PrefixedOpcode.SET_5_A: SetBit(Register8Bit.A, 5); break;
case PrefixedOpcode.SET_6_B: SetBit(Register8Bit.B, 6); break;
case PrefixedOpcode.SET_6_C: SetBit(Register8Bit.C, 6); break;
case PrefixedOpcode.SET_6_D: SetBit(Register8Bit.D, 6); break;
case PrefixedOpcode.SET_6_E: SetBit(Register8Bit.E, 6); break;
case PrefixedOpcode.SET_6_H: SetBit(Register8Bit.H, 6); break;
case PrefixedOpcode.SET_6_L: SetBit(Register8Bit.L, 6); break;
case PrefixedOpcode.SET_6_mHL: SetBit(registers.HL, 6); break;
case PrefixedOpcode.SET_6_A: SetBit(Register8Bit.A, 6); break;
case PrefixedOpcode.SET_7_B: SetBit(Register8Bit.B, 7); break;
case PrefixedOpcode.SET_7_C: SetBit(Register8Bit.C, 7); break;
case PrefixedOpcode.SET_7_D: SetBit(Register8Bit.D, 7); break;
case PrefixedOpcode.SET_7_E: SetBit(Register8Bit.E, 7); break;
case PrefixedOpcode.SET_7_H: SetBit(Register8Bit.H, 7); break;
case PrefixedOpcode.SET_7_L: SetBit(Register8Bit.L, 7); break;
case PrefixedOpcode.SET_7_mHL: SetBit(registers.HL, 7); break;
case PrefixedOpcode.SET_7_A: SetBit(Register8Bit.A, 7); break;
}
return(opcodeCycles.GetNumCyclesByPrefixedOpcode(opcode));
}