public VirtualMachine(ICPU cpu,IRAM ram) { this.cpu = cpu; this.ram = ram; cpu.machine = this; ram.machine = this; }
protected Computer(ICPU cpu, IRAM ram, IVideoCard videoCard, RAID hardDriveRaid, IMotherboard motherBoard) { this.cpu = cpu; this.ram = ram; this.videoCard = videoCard; this.hardDriveRaid = hardDriveRaid; this.motherBoard = motherBoard; }
public String CreateAndDisplay() { IComputer computer = factory.CreateComputer(); IRAM RAM = factory.CreateRAM(); IStorage storage = factory.CreateStorage(); decimal totalPrice = computer.getPrice() + RAM.getPrice() + storage.getPrice(); return("Your " + computer.getDescription() + "\n" + RAM.getDescription() + "\n" + storage.getDescription() + "\n* Price: " + totalPrice + ",-"); }
public RAMController(IRAM Iproduct, ICategoryRAM Icategories) { product = Iproduct; _categories = Icategories; }
public CPU128(IRAM ram, int coreCount) { this.ram = ram; this.NumberOfCores = coreCount; }
public PC(ICPU cpu, IRAM ram, IVideoCard videoCard, RAID hardDriveRaid, IMotherboard motherBoard) : base(cpu, ram, videoCard, hardDriveRaid, motherBoard) { }
public Laptop(ICPU cpu, IRAM ram, IVideoCard videoCard, RAID hardDriveRaid, IMotherboard motherBoard, IBattery battery) : base(cpu, ram, videoCard, hardDriveRaid, motherBoard) { this.battery = battery; }
public Server(ICPU cpu, IRAM ram, MonochromeVideoCard videoCard, RAID hardDriveRaid, MonochromeVideoCard motherBoard) : base(cpu, ram, videoCard, hardDriveRaid, motherBoard) { }
public Desktop(ICPU cpu, IRAM ram) { _cpu = cpu; _ram = ram; }
public void CreateRAM(int addrWidth, int dataWidth, int capacity, int readLatency, int writeLatency, out Component part, out IRAM ram) { throw new NotSupportedException("Only ROM can be created"); }
public Desktop_AMD() { _cpu = new AMD_CPU(); _ram = new Hynix_RAM(); }
public Desktop_Intel() { _cpu = new Intel_CPU(); _ram = new SAMSUNG_RAM(); }
public void CreateRAM(int addrWidth, int dataWidth, int capacity, int readLatency, int writeLatency, out Component part, out IRAM ram) { if (writeLatency != 1) throw new NotSupportedException(); bool regPrim, regOut; switch (readLatency) { case 1: regPrim = false; regOut = false; break; case 2: regPrim = true; regOut = false; break; case 3: regPrim = true; regOut = true; break; default: throw new NotSupportedException(); } BlockMem bmem = new BlockMem() { IPAlgorithm = BlockMem.EIPAlgorithm.MinimumArea, AssumeSynchronousClk = false, ECC = false, ECCType = BlockMem.EECCType.NoECC, EnableA = BlockMem.EENAUsage.UseENAPin, EnableB = BlockMem.EENBUsage.AlwaysEnabled, ErrorInjectionType = BlockMem.EErrorInjectionType.SingleBitErrorInjection, MemoryType = BlockMem.EMemoryType.SinglePortRAM, OperatingModeA = BlockMem.EOperatingMode.WriteFirst, OperatingModeB = BlockMem.EOperatingMode.WriteFirst, PipelineStages = 0, ReadWidthA = dataWidth, ReadWidthB = dataWidth, RegisterPortAInputOfSoftECC = false, RegisterPortAOutputOfMemoryCore = regOut, RegisterPortAOutputOfMemoryPrimitives = regPrim, RegisterPortBOutputOfMemoryCore = false, RegisterPortBOutputOfMemoryPrimitives = false, RegisterPortBOutputOfSoftECC = false, ResetMemoryLatchA = false, ResetMemoryLatchB = false, ResetPriorityA = BlockMem.EResetPriority.CE, ResetPriorityB = BlockMem.EResetPriority.CE, ResetType = BlockMem.EResetType.Sync, SoftECC = false, UseByteWriteEnable = false, UseErrorInjectionPins = false, UseRegCeAPin = false, UseRegCeBPin = false, UseRstAPin = false, UseRstBPin = false, WriteDepthA = MathExt.CeilPow2(capacity), WriteWidthA = dataWidth, WriteWidthB = dataWidth }; part = bmem; ram = bmem.SideA; }