public void DecrementIndirect()
{
_cpu.Registers[5] = 0xC0; // H
_cpu.Registers[6] = 0x12; // L = 0xC012
_cpu.WriteMemory(0xC012, 0xA0);
_cpu.WriteMemory(0xC013, 0x10);
_cpu.WriteMemory(0xC014, 0x00);
_cpu.WriteMemory(0xC015, 0x01);
_cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 0] = 0x35;
_cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 1] = 0x35;
_cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 2] = 0x35;
_cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 3] = 0x35;
_cpu.Step();
Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 1, 12, FlagRegister.Carry | FlagRegister.HalfCarry | FlagRegister.NSubstract);
Assert.AreEqual((byte)0x9F, _cpu.ResolveMemory(0xC012));
_cpu.Registers[6] = 0x13;
_cpu.Step();
Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 2, 24, FlagRegister.Carry | FlagRegister.NSubstract | FlagRegister.HalfCarry);
Assert.AreEqual((byte)0x0F, _cpu.ResolveMemory(0xC013));
_cpu.Registers[6] = 0x14;
_cpu.Step();
Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 3, 36, FlagRegister.Carry | FlagRegister.HalfCarry | FlagRegister.NSubstract);
Assert.AreEqual((byte)0xFF, _cpu.ResolveMemory(0xC014));
_cpu.Registers[6] = 0x15;
_cpu.Step();
Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 4, 48, FlagRegister.Carry | FlagRegister.Zero | FlagRegister.NSubstract);
Assert.AreEqual((byte)0x00, _cpu.ResolveMemory(0xC015));
}
public void StoreWordIndirectHL()
{
_cpu.Registers[5] = 0xC0;
_cpu.Registers[6] = 0x11;
_cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress] = 0x36;
_cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 1] = 0xCC;
_cpu.Step();
Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 2, 12UL);
Assert.AreEqual(0xCC, _cpu.ResolveMemory(0xC011));
}
private static void UpdateConsole()
{
if (_cpu.PC == _breakpoint)
{
_step = true;
}
if (_step)
{
Console.Clear();
Console.WriteLine("AF= {0:X2}{1:X2}", _cpu.Registers[0], (byte)_cpu.F);
Console.WriteLine("BC= {0:X2}{1:X2}", _cpu.Registers[1], _cpu.Registers[2]);
Console.WriteLine("DE= {0:X2}{1:X2}", _cpu.Registers[3], _cpu.Registers[4]);
Console.WriteLine("HL= {0:X2}{1:X2}", _cpu.Registers[5], _cpu.Registers[6]);
Console.WriteLine("SP= {0:X4}", _cpu.SP);
Console.WriteLine("PC= {0:X4}", _cpu.PC);
if (_cpu.PC == _breakpoint)
{
Console.WriteLine("Breakpoint hit!");
}
var info = Console.ReadKey(true);
switch (info.Key)
{
case ConsoleKey.M: //[M]emory
{
Console.Write("Memory address: ");
var mem = Console.ReadLine();
var addr = Convert.ToUInt16(mem, 16);
Console.WriteLine(_cpu.ResolveMemory(addr));
Console.ReadKey(true);
break;
}
case ConsoleKey.B: // [B]reakpoint
{
Console.Write("Breakpoint address: ");
var mem = Console.ReadLine();
_breakpoint = Convert.ToUInt16(mem, 16);
_step = false;
break;
}
case ConsoleKey.R: // [R]un
_step = false;
break;
case ConsoleKey.T: // [T]ime
Console.Write("Benchmark: ");
var ben = Console.ReadLine();
TestLength(Convert.ToUInt64(ben));
Console.WriteLine("Press any key to resume debugger...");
Console.ReadKey(true);
break;
case ConsoleKey.E: // [E]xit
_running = false;
break;
}
}
}