private void AddBits0To8(CIRegisterVisualization aVisualization, bool aIsIABitReserved) { uint value = aVisualization.Register.Value; // Processor mode CIRegisterVisBitRange rangeProcMode = new CIRegisterVisBitRange(Container, 0, 4, "Processor Mode"); rangeProcMode.Interpretation = ArmRegisterBankUtils.BankAsStringLong(ProcessorMode); rangeProcMode.ExtractBits(value, "########", "########", "########", "###11111"); aVisualization.AddChild(rangeProcMode); // Thumb bit CIRegisterVisBit thumbBit = CreateYesNoBit(aVisualization, 5, "########", "########", "########", "##1#####", false, "Thumb Mode", "T"); aVisualization.AddChild(thumbBit); // FIQ, IRQ bits CIRegisterVisBitGroup gpIRQs = new CIRegisterVisBitGroup(Container, "Interrupt Disabled Bits"); CIRegisterVisBit fiqBit = CreateYesNoBit(aVisualization, 6, "########", "########", "########", "#1######", false, "FIQ Disabled", "F"); gpIRQs.Add(fiqBit); CIRegisterVisBit irqBit = CreateYesNoBit(aVisualization, 7, "########", "########", "########", "1#######", false, "IRQ Disabled", "I"); gpIRQs.Add(irqBit); // Imprecise Abort bit - reserved in non-ARMv5 CIRegisterVisBit iaBit = CreateYesNoBit(aVisualization, 8, "########", "########", "#######1", "########", aIsIABitReserved, "Imprecise Aborts", "A"); gpIRQs.Add(iaBit); aVisualization.AddChild(gpIRQs); }
private CIRegisterVisBitRange AddBitRange(CIRegisterVisualization aVisualization, uint aStart, uint aEnd, string aCategory) { // Make the mask AddressRange range = new AddressRange(aStart, aEnd); StringBuilder mask = new StringBuilder(); mask.Append(string.Empty.PadLeft(32, '#')); for (int i = 31; i >= 0; i--) { if (range.Contains(i)) { int index = 31 - i; mask[index] = '1'; } } // Reserved uint value = aVisualization.Register.Value; CIRegisterVisBitRange bitRange = new CIRegisterVisBitRange(Container, aStart, aEnd, aCategory); bitRange.ExtractBits(value, mask.ToString()); aVisualization.AddChild(bitRange); return(bitRange); }
private void AddEndianness(CIRegisterVisualization aVisualization, bool aIsReserved) { uint value = aVisualization.Register.Value; CIRegisterVisBit eBit = CreateBitValue(aVisualization, 9, "###1####", "########", "######1#", "########", aIsReserved, "Endianness", "Big", "Little", "B", "L"); aVisualization.AddChild(eBit); }
private void AddConditionCodeFlags(CIRegisterVisualization aVisualization) { uint value = aVisualization.Register.Value; CIRegisterVisBitGroup group = new CIRegisterVisBitGroup(Container); CIRegisterVisBit oBit = CreateYesNoBit(aVisualization, 28, "###1####", "########", "########", "########", false, "Overflow (Condition Code)", "O"); group.Add(oBit); CIRegisterVisBit cBit = CreateYesNoBit(aVisualization, 29, "##1#####", "########", "########", "########", false, "Carry (Condition Code)", "C"); group.Add(cBit); CIRegisterVisBit zBit = CreateYesNoBit(aVisualization, 30, "#1######", "########", "########", "########", false, "Zero (Condition Code)", "Z"); group.Add(zBit); CIRegisterVisBit nBit = CreateYesNoBit(aVisualization, 31, "1#######", "########", "########", "########", false, "Negative (Condition Code)", "N"); group.Add(nBit); aVisualization.AddChild(group); }
private void AddQFlag(CIRegisterVisualization aVisualization, bool aIsReserved) { CIRegisterVisBit bit = CreateYesNoBit(aVisualization, 27, "####1###", "########", "########", "########", aIsReserved, "Q-Flag (DSP Saturation/Overflow)", "Q"); aVisualization.AddChild(bit); }
private void AddJazelle(CIRegisterVisualization aVisualization, bool aIsReserved) { CIRegisterVisBit bit = CreateYesNoBit(aVisualization, 24, "#######1", "########", "########", "########", aIsReserved, "Jazelle", "J"); aVisualization.AddChild(bit); }