/// <summary>
/// Creates a table to map from architectural register to a physical register.
/// Initialized to have a mapping from every architectural register to a physical register.
/// </summary>
/// <param name="archRegisterCount">Number of architectural registers</param>
/// <param name="freeList">Free table reference to calculate initial mapping</param>
public MappingTable(int archRegisterCount, FreeList freeList)
{
Map = new int[archRegisterCount];
for (int i = 0; i < archRegisterCount; i++)
{
Map[i] = freeList.GetUnusedRegister();
}
}
public CPU(UInt16[] instr)
{
FE_DE.Instructions = new Queue <IData>();
DE_RN.Ops = new Queue <DecodedOp>();
this.PhysFreeList = new FreeList(PHYSICAL_REGISTER_COUNT);
this.PhysRegisters = new RegisterFile(PHYSICAL_REGISTER_COUNT);
this.ArchRegisters = new RegisterFile(ARCHITECTURE_REGISTER_COUNT);
this.ArchToPhysTable = new MappingTable(ARCHITECTURE_REGISTER_COUNT, this.PhysFreeList);
this.CommitRAT = new MappingTable(ARCHITECTURE_REGISTER_COUNT);
this.CommitRAT.CopyFrom(this.ArchToPhysTable);
this.InstructionList = instr;
this.FUs = new List <FunctionalUnit>();
this.IQueue = new IssueQueue(ISSUE_QUEUE_SIZE);
this.ROB = new ReOrderBuffer(REORDER_BUFFER_SIZE);
this.FUs.Add(new ArithmeticLogicUnit(this));
this.FUs.Add(new ArithmeticLogicUnit(this));
this.FUs.Add(new ArithmeticLogicUnit(this));
this.FUs.Add(new ArithmeticLogicUnit(this));
this.FUs.Add(new BranchUnit(this));
this.FUs.Add(new LoadStoreUnit(this));
}
